Attention is currently required from: Angel Pons. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49213 )
Change subject: soc/intel/common/uart: Use simple(_s_) variants of PCI functions ......................................................................
Patch Set 2:
(3 comments)
Patchset:
PS2:
Patch Set 2:
That is where I am planning to head towards eventually. But, it requires adding aliases for the SoCs and updating all relevant common/ and soc/ specific code. Until I can get there I am taking smaller steps to clean up in little chunks to get some space freed up for mainboards that are hitting the limit for bootblock.
What limit for bootblock? C_ENV_BOOTBLOCK_SIZE is artificial and could be dropped, CB:47600. For certain platforms reducing .text alone also does not help because increasing .bss can also move _start16bit too far away from .reset.
C_ENV_BOOTBLOCK_SIZE is real for APL/GLK platforms. Those platforms actually cannot have a bootblock size greater than C_ENV_BOOTBLOCK_SIZE. This is because of the CSE/boot flow requirements for the platforms.
File src/soc/intel/common/block/uart/uart.c:
https://review.coreboot.org/c/coreboot/+/49213/comment/e4533d0a_28a779e9 PS2, Line 61: devfn
Hmmm... I feel this `devfn` can confuse people (at least it confuses me). […]
Yeah, it has been on my list for a long time now to clean up the whole devfn/PCI_DEV weirdness. Hopefully, we can get to it soon.
I kept this as devfn because there is already a uart_get_device() which returns `struct device *`. Let me see if I can come up with another name.
https://review.coreboot.org/c/coreboot/+/49213/comment/793e8536_3faa8d69 PS2, Line 215: if (uart_controller_needs_init(dev)) { : uintptr_t base; : pci_devfn_t devfn = PCI_BDF(dev); : : base = pci_s_read_config32(devfn, PCI_BASE_ADDRESS_0) & ~0xFFF; : if (base) : uart_lpss_init(devfn, base); : }
This function is ramstage-only. […]
Ack.