Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held. Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52056 )
Change subject: soc/amd/common/espi: Clear DNCMD_COMPLETE on completion ......................................................................
soc/amd/common/espi: Clear DNCMD_COMPLETE on completion
Tidy up the interrupt status. This will leave SLAVE0_INT_STS = 0.
BUG=b:183524609 TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I950cfb81521e35758c120a482670cfdb924201d2 --- M src/soc/amd/common/block/lpc/espi_util.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/52056/1
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index 9de38a3..e328a22 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -475,6 +475,8 @@ return -1; }
+ espi_write32(ESPI_SLAVE0_INT_STS, ESPI_STATUS_DNCMD_COMPLETE); + return 0; }