Hello Kyösti Mälkki, Aaron Durbin, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34995
to look at the new patch set (#2).
Change subject: arch/x86: Cache the TSEG region at the top of ram ......................................................................
arch/x86: Cache the TSEG region at the top of ram
This patch helps to save additional ~6ms of booting time in normal boot and s3 resume on CML-hatch.
Change-Id: I59432c02e04af1b931d77de3f6652b0327ca82bb Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/arch/x86/postcar_loader.c 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/34995/2