[coreboot-gerrit] Change in coreboot[master]: mb/prodrive/hermes: Correct memory RCOMP settings

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58364 )

Change subject: mb/prodrive/hermes: Correct memory RCOMP settings
......................................................................

mb/prodrive/hermes: Correct memory RCOMP settings

The original RCOMP resistor and target values only apply to ULT CPUs and
do not make sense for the CFL-S CPUs Hermes uses. Fix the RCOMP settings
and the associated comments.

Change-Id: I015797c58c914c6581d472e6d70d2dd7bad2b14f
Signed-off-by: Angel Pons 
---
M src/mainboard/prodrive/hermes/memory.c
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/58364/1

diff --git a/src/mainboard/prodrive/hermes/memory.c b/src/mainboard/prodrive/hermes/memory.c
index 0ff21c4..48814c7 100644
--- a/src/mainboard/prodrive/hermes/memory.c
+++ b/src/mainboard/prodrive/hermes/memory.c
@@ -22,11 +22,11 @@
    	.spd_spec = {.spd_smbus_address = 0xA6}
    },

-	/* Baseboard uses 121, 81 and 100 rcomp resistors */
-	.rcomp_resistor = {121, 81, 100},
+	/* Rcomp resistors on CFL-S are located on the CPU itself */
+	.rcomp_resistor = {121, 75, 100},

-	/* Baseboard Rcomp target values. */
-	.rcomp_targets = {100, 40, 20, 20, 26},
+	/* CFL-S DDR4 Rcomp target values */
+	.rcomp_targets = {60, 26, 20, 20, 26},

/* Baseboard is an interleaved design */
    .dq_pins_interleaved = 1,