[coreboot-gerrit] Change in coreboot[master]: amdfwtool: Add ISH header support for A/B recovery layout

[Felix Held (Code Review)]

Attention is currently required from: Bao Zheng, Jason Glenesk, Martin Roth, Marshall Dawson, Zheng Bao.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57747 )

Change subject: amdfwtool: Add ISH header support for A/B recovery layout
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Patch Set 24:

(1 comment)

File util/amdfwtool/amdfwtool.c:

https://review.coreboot.org/c/coreboot/+/57747/comment/470b7537_d00d2072 
PS24, Line 396: 0x1000
> would be good to have a define for this

from the documentation i'd say that this value is correct; I think all modern spi flash chips have an erase block size of 4kByte. not sure if ERASE_ALIGNMENT or TABLE_ALIGNMENT would be the definition to use here, but would be good to use one of those two defines