Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38233 )
Change subject: [WIP] device/smbus_host: Declare common early SMBUS prototypes ......................................................................
[WIP] device/smbus_host: Declare common early SMBUS prototypes
Change-Id: I1157cf391178a27db437d1d08ef5cb9333e976d0 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/include/device/smbus.h M src/include/device/smbus_host.h M src/mainboard/aopen/dxplplusu/romstage.c M src/mainboard/asus/p2b-ds/romstage.c M src/mainboard/asus/p2b-ls/romstage.c M src/mainboard/asus/p2b/romstage.c M src/mainboard/lenovo/x201/romstage.c M src/northbridge/intel/i945/debug.c M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/x4x/raminit.c M src/southbridge/intel/bd82x6x/early_smbus.c M src/southbridge/intel/bd82x6x/pch.h M src/southbridge/intel/i82371eb/early_smbus.c M src/southbridge/intel/i82371eb/i82371eb.h M src/southbridge/intel/i82801dx/early_smbus.c M src/southbridge/intel/i82801dx/i82801dx.h M src/southbridge/intel/i82801gx/early_smbus.c M src/southbridge/intel/i82801gx/i82801gx.h M src/southbridge/intel/i82801ix/early_smbus.c M src/southbridge/intel/i82801ix/i82801ix.h M src/southbridge/intel/i82801jx/early_smbus.c M src/southbridge/intel/i82801jx/i82801jx.h M src/southbridge/intel/ibexpeak/early_smbus.c M src/southbridge/intel/ibexpeak/pch.h M src/southbridge/intel/lynxpoint/early_smbus.c M src/southbridge/intel/lynxpoint/pch.h 27 files changed, 39 insertions(+), 139 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/38233/1
diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h index cae4f3f..5782d5e 100644 --- a/src/include/device/smbus.h +++ b/src/include/device/smbus.h @@ -29,6 +29,7 @@
struct bus *get_pbus_smbus(struct device *dev);
+#if !DEVTREE_EARLY static inline int smbus_recv_byte(struct device *const dev) { return i2c_dev_readb(dev); @@ -51,5 +52,6 @@
int smbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buffer); int smbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *buffer); +#endif
#endif /* DEVICE_SMBUS_H */ diff --git a/src/include/device/smbus_host.h b/src/include/device/smbus_host.h index 4d67e18..0236c5c 100644 --- a/src/include/device/smbus_host.h +++ b/src/include/device/smbus_host.h @@ -51,4 +51,36 @@ printk(BIOS_DEBUG, "SMBus controller enabled\n"); }
+#if DEVTREE_EARLY +static inline int smbus_read_byte(u8 device, u8 address) +{ + uintptr_t base = smbus_base(); + return do_smbus_read_byte(base, device, address); +} + +static inline int smbus_write_byte(u8 device, u8 address, u8 data) +{ + uintptr_t base = smbus_base(); + return do_smbus_write_byte(base, device, address, data); +} + +static inline int smbus_block_read(u8 device, u8 cmd, size_t max_bytes, u8 *buf) +{ + uintptr_t base = smbus_base(); + return do_smbus_block_read(base, device, cmd, max_bytes, buf); +} + +static inline int smbus_block_write(u8 device, u8 cmd, size_t bytes, const u8 *buf) +{ + uintptr_t base = smbus_base(); + return do_smbus_block_write(base, device, cmd, bytes, buf); +} + +static inline int i2c_eeprom_read(u8 device, u8 offset, size_t bytes, u8 *buf) +{ + uintptr_t base = smbus_base(); + return do_i2c_eeprom_read(base, device, offset, bytes, buf); +} +#endif + #endif diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c index ebbcc15..c647f96 100644 --- a/src/mainboard/aopen/dxplplusu/romstage.c +++ b/src/mainboard/aopen/dxplplusu/romstage.c @@ -20,7 +20,6 @@ #include <device/smbus_host.h> #include <arch/romstage.h>
-#include <southbridge/intel/i82801dx/i82801dx.h> #include <northbridge/intel/e7505/raminit.h>
int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c index b885f86..5fed7c5 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/romstage.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <southbridge/intel/i82371eb/i82371eb.h> #include <device/smbus_host.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c index bbf53bc..4e5c355 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/romstage.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <southbridge/intel/i82371eb/i82371eb.h> #include <device/smbus_host.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c index 8ec579c..971255a4 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/romstage.c @@ -15,7 +15,6 @@ */
#include <console/console.h> -#include <southbridge/intel/i82371eb/i82371eb.h> #include <device/smbus_host.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 7bab957..e5f511d 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -19,8 +19,8 @@ #include <stdint.h> #include <arch/io.h> #include <ec/acpi/ec.h> +#include <device/smbus_host.h>
-#include <southbridge/intel/ibexpeak/pch.h> #include <northbridge/intel/nehalem/nehalem.h>
const struct southbridge_usb_port mainboard_usb_ports[] = { diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c index 2acbc57..6361a58 100644 --- a/src/northbridge/intel/i945/debug.c +++ b/src/northbridge/intel/i945/debug.c @@ -17,6 +17,7 @@ #include <spd.h> #include <device/pci_ops.h> #include <device/pci_def.h> +#include <device/smbus_host.h> #include <console/console.h> #include "i945.h"
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index f0ea142..b6d9e6f 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -18,6 +18,7 @@ #include <delay.h> #include <device/pci_def.h> #include <device/pci_ops.h> +#include <device/smbus_host.h> #include <cf9_reset.h> #include <device/mmio.h> #include <device/device.h> diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 215e9b8..42e6ebe 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -20,6 +20,7 @@ #include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> +#include <device/smbus_host.h> #include <cpu/x86/msr.h> #include <cbmem.h> #include <cf9_reset.h> diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index df2d31e..0809998 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -15,17 +15,13 @@ */
#include <device/pci_ops.h> +#include <device/smbus_host.h> #include <cbmem.h> #include <cf9_reset.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/mtrr.h> #include <arch/cpu.h> -#if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) -#include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */ -#else -#include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */ -#endif #include <spd.h> #include <string.h> #include <device/dram/ddr2.h> diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index 91f1bc3..7fa6f88 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -45,8 +45,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 5348478..67dbf69 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -64,10 +64,6 @@
void enable_usb_bar(void);
-#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -#endif - void early_thermal_init(void); void southbridge_configure_default_intmap(void); void southbridge_rcba_config(void); diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c index 99fe128..1775706 100644 --- a/src/southbridge/intel/i82371eb/early_smbus.c +++ b/src/southbridge/intel/i82371eb/early_smbus.c @@ -52,8 +52,3 @@
return 0; } - -int smbus_read_byte(u8 device, u8 address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index ea7efef..9076829 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -21,10 +21,6 @@
void enable_pm(void);
-#if ENV_ROMSTAGE -int smbus_read_byte(u8 device, u8 address); -#endif - #endif
/* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c index 6e1f1f7..51110c4 100644 --- a/src/southbridge/intel/i82801dx/early_smbus.c +++ b/src/southbridge/intel/i82801dx/early_smbus.c @@ -37,8 +37,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index 9895de1..06f0f57 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -32,10 +32,8 @@ #if !defined(__ASSEMBLER__)
#include <device/device.h> -#include "chip.h"
void i82801dx_enable(struct device *dev); -int smbus_read_byte(unsigned int device, unsigned int address); void aseg_smm_lock(void);
#endif diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index b89e57d..54aaa4f 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -45,24 +45,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} - -int i2c_eeprom_read(unsigned int device, unsigned int offset, u32 bytes, u8 *buf) -{ - return do_i2c_eeprom_read(SMBUS_IO_BASE, device, offset, bytes, buf); -} - -int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf) -{ - return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf); -} - -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, - const u8 *buf) -{ - return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf); -} diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index 688f1c3..7c326a7 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -41,15 +41,7 @@ void i82801gx_setup_bars(void); void i82801gx_early_init(void);
-#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -int i2c_eeprom_read(unsigned int device, unsigned int cmd, unsigned int bytes, - u8 *buf); -int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf); -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, - const u8 *buf); void ich7_setup_cir(void); -#endif
#define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c index 60f49d2..f6ce713 100644 --- a/src/southbridge/intel/i82801ix/early_smbus.c +++ b/src/southbridge/intel/i82801ix/early_smbus.c @@ -47,8 +47,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index f60aad3..667bd50 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -213,10 +213,6 @@ void i82801ix_dmi_setup(void); void i82801ix_dmi_poll_vc1(void);
-#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -#endif - #endif #endif
diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c index 8e3329c..18a61b7 100644 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ b/src/southbridge/intel/i82801jx/early_smbus.c @@ -42,24 +42,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} - -int i2c_eeprom_read(unsigned int device, unsigned int offset, u32 bytes, u8 *buf) -{ - return do_i2c_eeprom_read(SMBUS_IO_BASE, device, offset, bytes, buf); -} - -int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf) -{ - return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf); -} - -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, - const u8 *buf) -{ - return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf); -} diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h index abf6187..2372014 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.h +++ b/src/southbridge/intel/i82801jx/i82801jx.h @@ -225,14 +225,6 @@ } #define LPC_IS_MOBILE(dev) lpc_is_mobile(pci_read_config16(dev, PCI_DEVICE_ID))
-#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -int i2c_eeprom_read(unsigned int device, unsigned int cmd, unsigned int bytes, - u8 *buf); -int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf); -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, - const u8 *buf); -#endif void i82801jx_lpc_setup(void); void i82801jx_setup_bars(void); void i82801jx_early_init(void); diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c index 52d483d..7fa6f88 100644 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ b/src/southbridge/intel/ibexpeak/early_smbus.c @@ -45,23 +45,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} - -int smbus_write_byte(unsigned int device, unsigned int address, u8 data) -{ - return do_smbus_write_byte(SMBUS_IO_BASE, device, address, data); -} - -int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf) -{ - return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf); -} - -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, const u8 *buf) -{ - return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf); -} diff --git a/src/southbridge/intel/ibexpeak/pch.h b/src/southbridge/intel/ibexpeak/pch.h index 424bf42..8ac506d 100644 --- a/src/southbridge/intel/ibexpeak/pch.h +++ b/src/southbridge/intel/ibexpeak/pch.h @@ -54,13 +54,6 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue); void enable_usb_bar(void);
-#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -int smbus_write_byte(unsigned int device, unsigned int address, u8 data); -int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf); -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, const u8 *buf); -#endif - void early_pch_init(void);
void early_thermal_init(void); diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c index 91f1bc3..7fa6f88 100644 --- a/src/southbridge/intel/lynxpoint/early_smbus.c +++ b/src/southbridge/intel/lynxpoint/early_smbus.c @@ -45,8 +45,3 @@
return 0; } - -int smbus_read_byte(unsigned int device, unsigned int address) -{ - return do_smbus_read_byte(SMBUS_IO_BASE, device, address); -} diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 9622c67..b6bf00b 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -174,11 +174,6 @@ void acpi_create_intel_hpet(acpi_hpet_t * hpet); void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
- -#if ENV_ROMSTAGE -int smbus_read_byte(unsigned int device, unsigned int address); -#endif - void enable_usb_bar(void); int early_pch_init(const void *gpio_map, const struct rcba_config_instruction *rcba_config);