Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63120 )
Change subject: util/amdfwtool: add MSMU, SPIROM_CFG and DMCUB PSP FW types ......................................................................
util/amdfwtool: add MSMU, SPIROM_CFG and DMCUB PSP FW types
Compared to Cezanne, the Sabrina SoC has a 3 additional PSP firmware table entries, so add those as a preparation for Sabrina support.
Signed-off-by: Zheng Bao fishbaozi@gmail.com Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Iaa5aacd53b3c7637f6d5e94b1a8d92bba57ddb9d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63120 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 15 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 8023595..263336a 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -260,6 +260,9 @@ { .type = AMD_FW_SPL, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_MSMU, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_DMCUB, .level = PSP_LVL2 | PSP_LVL2_AB }, + { .type = AMD_FW_SPIROM_CFG, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_FW_PSP_BOOTLOADER_AB, .level = PSP_LVL2 | PSP_LVL2_AB }, { .type = AMD_ABL0, .level = PSP_BOTH | PSP_LVL2_AB }, diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 70afe3c..ff2f63b 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -54,6 +54,9 @@ AMD_FW_SPL = 0x55, AMD_FW_DMCU_ERAM = 0x58, AMD_FW_DMCU_ISR = 0x59, + AMD_FW_MSMU = 0x5a, + AMD_FW_SPIROM_CFG = 0x5c, + AMD_FW_DMCUB = 0x71, AMD_FW_PSP_BOOTLOADER_AB = 0x73, AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */ AMD_FW_GEC, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index e883d17..09b975d 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -306,6 +306,15 @@ } else if (strcmp(fw_name, "DMCUINTVECTORSDCN21_FILE") == 0) { fw_type = AMD_FW_DMCU_ISR; subprog = 0; + } else if (strcmp(fw_name, "MSMU_FILE") == 0) { + fw_type = AMD_FW_MSMU; + subprog = 0; + } else if (strcmp(fw_name, "DMCUB_FILE") == 0) { + fw_type = AMD_FW_DMCUB; + subprog = 0; + } else if (strcmp(fw_name, "SPIROM_CONFIG_FILE") == 0) { + fw_type = AMD_FW_SPIROM_CFG; + subprog = 0; } else if (strcmp(fw_name, "PSP_KVM_ENGINE_DUMMY_FILE") == 0) { fw_type = AMD_FW_KVM_IMAGE; subprog = 0;
1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.