[coreboot-gerrit] [S] Change in coreboot[main]: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls

[Martin Roth (Code Review)]

Attention is currently required from: Ana Carolina Cabral, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nick Kochlowski, Paul Menzel.

Martin Roth has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/84915?usp=email )

Change subject: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls
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Patch Set 7:

(2 comments)

File src/soc/amd/phoenix/chip.c:

PS6:
> i'd say that having a comment in this file would be helpful to understand whwre/how the other timepo […]

I mentioned this in a private chat, but I agree that chip.c isn't really the place for this code.

https://review.coreboot.org/c/coreboot/+/84915/comment/26da3a98_0a67d2d6?usp... :
PS6, Line 41: default:
            : 			break;
> Out of good practice, I left the default case and added an error log although we shouldn't expect to […]

Is an empty default block good practice? I wouldn't think so, but maybe there's some reason I don't understand.

As I said, I could see using it to print an error or something, but as far as I can see, having an empty default block is the same as not having a default block at all, just with more lines of code.