Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39774 )
Change subject: soc/intel/tigerlake: Remove Jasper Lake SoC references ......................................................................
Patch Set 6:
(8 comments)
Patch Set 5:
Can you please organize the CLs this way:
- Copy the required source to JSL SoC.
- Move the Dedede & JSLRVP mainboards from TGL to JSL.
- Clean-up the TGL SoC tree and any mainboards using TGL.
That makes it better from the code-review standpoint.
Indeed. Furthermore, clean-up can be split in two changes: 1) Remove all JSL code from TGL. 2) Rename the "_tgl" files as necessary.
https://review.coreboot.org/c/coreboot/+/39774/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39774/6//COMMIT_MSG@9 PS6, Line 9: soc SoC
https://review.coreboot.org/c/coreboot/+/39774/6//COMMIT_MSG@9 PS6, Line 9: tgl TGL
https://review.coreboot.org/c/coreboot/+/39774/6//COMMIT_MSG@9 PS6, Line 9: jsl JSL
https://review.coreboot.org/c/coreboot/+/39774/6//COMMIT_MSG@10 PS6, Line 10: lake Lake
https://review.coreboot.org/c/coreboot/+/39774/6//COMMIT_MSG@10 PS6, Line 10: Also removes Add a subject:
It also removes ...
https://review.coreboot.org/c/coreboot/+/39774/6/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:
https://review.coreboot.org/c/coreboot/+/39774/6/src/mainboard/google/voltee... PS6, Line 11: #include <soc/meminit_tgl.h> I would not rely on indirect inclusion of `<baseboard/variants.h>`. Instead, update the include:
#include <soc/meminit.h>
https://review.coreboot.org/c/coreboot/+/39774/6/src/mainboard/intel/tglrvp/... File src/mainboard/intel/tglrvp/romstage_fsp_params.c:
https://review.coreboot.org/c/coreboot/+/39774/6/src/mainboard/intel/tglrvp/... PS6, Line 20: #include <soc/meminit_tgl.h> I would not rely on indirect inclusion of `<baseboard/variants.h>`. Instead, update the include:
#include <soc/meminit.h>
https://review.coreboot.org/c/coreboot/+/39774/6/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pci_irqs.asl:
PS6: To make the diffstat easier to review, could we please rename the files in a separate change?