[coreboot-gerrit] Change in coreboot[master]: mb/clevo/l140cu: drop disabled SPD indices

[Michael Niewöhner (Code Review)]

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46248 )

Change subject: mb/clevo/l140cu: drop disabled SPD indices
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mb/clevo/l140cu: drop disabled SPD indices

Drop the disabled SPD indices from memcfg, since they're already
initialized to 0.

Change-Id: I6d88bdac17222c2c5c35439517fe0bea46744b2b
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46248
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
Reviewed-by:  Felix Singer 
---
M src/mainboard/clevo/cml-u/variants/l140cu/romstage.c
1 file changed, 0 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
   Felix Singer: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c b/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c
index 1af8ce6..4401483 100644
--- a/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c
+++ b/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c
@@ -4,17 +4,14 @@
 #include <soc/romstage.h>

static const struct cnl_mb_cfg memcfg = {
-	/* Parameters required to access SPD for CH0D0/CH0D1/CH1D0/CH1D1. */
    .spd[0] = {
    	.read_type = READ_SPD_CBFS,
    	.spd_spec = {.spd_index = 0},
    },
-	.spd[1] = {.read_type = NOT_EXISTING},
    .spd[2] = {
    	.read_type = READ_SMBUS,
    	.spd_spec = {.spd_smbus_address = 0xa4},
    },
-	.spd[3] = {.read_type = NOT_EXISTING},

/*
     * For each channel, there are 3 sets of DQ byte mappings,