[coreboot-gerrit] Change in coreboot[master]: nb/intel/haswell/pei_data.h: Add ULT system type

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40692 )

Change subject: nb/intel/haswell/pei_data.h: Add ULT system type
......................................................................

nb/intel/haswell/pei_data.h: Add ULT system type

Looks like 5 is a valid system type, as Google Beltino and Slippy are
using it. According to comments on these mainboards' code, this value
corresponds to ULT systems. So, add it to the comment on the pei_data
struct, which was likely copied from Sandy Bridge and was not updated.

Change-Id: I3654bb6022839dba3e1499cf43e8beaa97d1def1
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40692
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
---
M src/northbridge/intel/haswell/pei_data.h
1 file changed, 2 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Matt DeVillier: Looks good to me, approved

diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h
index 17b7c18..643b830 100644
--- a/src/northbridge/intel/haswell/pei_data.h
+++ b/src/northbridge/intel/haswell/pei_data.h
@@ -81,7 +81,8 @@
    uint32_t pmbase;
    uint32_t gpiobase;
    uint32_t temp_mmio_base;
-	uint32_t system_type; // 0 Mobile, 1 Desktop/Server
+	/* System type: 0 => Mobile, 1 => Desktop/Server, 5 => ULT, Others => Reserved */
+	uint32_t system_type;
    uint32_t tseg_size;
    uint8_t spd_addresses[4];
    int boot_mode;