[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/xeon_sp: Rewrite acpi_create_satc

[Shuo Liu (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Shuo Liu, Tim Chu.

Hello Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/81049?usp=email

to look at the new patch set (#10).

The following approvals got outdated and were removed:
Code-Review+1 by Paul Menzel, Code-Review+2 by Patrick Rudolph, Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp: Rewrite acpi_create_satc
......................................................................

soc/intel/xeon_sp: Rewrite acpi_create_satc

SATC is for RCiEPs (Root Complex Integrated EndPoints) but not
limited to IOAT domains. Rewrite the func by iterating all domains
and its RCiEPs. Currently the codes only support 1 PCIe segment.

TEST=intel/archercity CRB

coreboot SATC generation logs are unchanged before and after.

Change-Id: I1dfc56ccf279b77cfab4ae3457aa8799d2d57a34
Signed-off-by: Shuo Liu 
Signed-off-by: Jincheng Li 
---
M src/soc/intel/xeon_sp/uncore_acpi.c
1 file changed, 16 insertions(+), 27 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/81049/10