Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48364 )
Change subject: sb/intel/x/smbus.c: Factor out common code ......................................................................
Patch Set 1: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/48364/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48364/1//COMMIT_MSG@11 PS1, Line 11: Tested?
https://review.coreboot.org/c/coreboot/+/48364/1/src/southbridge/intel/commo... File src/southbridge/intel/common/smbus_ops.c:
https://review.coreboot.org/c/coreboot/+/48364/1/src/southbridge/intel/commo... PS1, Line 77: /* The memory BAR does not exist for ICH7 and earlier */ : if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) : return; : : /* Also add MMIO resource */ : res = pci_get_resource(dev, PCI_BASE_ADDRESS_0); Could we instead call the generic pci_dev_read_resources() and then patch the port IO resource? This would not need any knowledge about the MMIO resource at all.