Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44359 )
Change subject: mainboard/google/volteer: Enable long cr50 ready pulses
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Patch Set 16:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44359/16//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/44359/16//COMMIT_MSG@7
PS16, Line 7: Enable long cr50 ready pulses
nit: With all the changes that have happened in the review process, this change is not really enabling long pulses. It is basically enabling S0i3.4 and GPIO PM config only if long pulses are enabled
https://review.coreboot.org/c/coreboot/+/44359/16/src/mainboard/google/volte...
File src/mainboard/google/volteer/mainboard.c:
https://review.coreboot.org/c/coreboot/+/44359/16/src/mainboard/google/volte...
PS16, Line 26: mainboard_config_update
mainboard_update_soc_chip_config
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