Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39371 )
Change subject: mb/asus/f2a85-m_pro: Enable UART A in Super I/O ......................................................................
Patch Set 14: Code-Review+1
(3 comments)
https://review.coreboot.org/c/coreboot/+/39371/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39371/3//COMMIT_MSG@11 PS3, Line 11: Here is the relevant output of `superiotool` for the global control : registers running the vendor firmware: : : Found Nuvoton NCT6779D (id=0xc562) at 0x2e : Register dump: : idx 10 11 13 14 1a 1b 1c 1d 20 21 22 24 25 26 27 28 2a 2b 2c 2f : val ff ff ff ff 3a 28 00 10 c5 62 df 04 00 00 10 00 48 20 00 01 : def ff ff 00 00 30 70 10 00 c5 62 ff 04 00 MM 00 00 c0 00 01 MM
I don't think this is really needed
Not a big deal
https://review.coreboot.org/c/coreboot/+/39371/5/src/mainboard/asus/f2a85-m/... File src/mainboard/asus/f2a85-m/bootblock.c:
https://review.coreboot.org/c/coreboot/+/39371/5/src/mainboard/asus/f2a85-m/... PS5, Line 47: pnp_write_config
You may want to use the functions from CB:42134
Ack
https://review.coreboot.org/c/coreboot/+/39371/5/src/mainboard/asus/f2a85-m/... PS5, Line 51: printk(BIOS_DEBUG, "old reg: 0x%x", reg);
This is futile as the console is only initialized after bootblock_mainboard_early_init().
Ack