[coreboot-gerrit] Change in coreboot[master]: [TESTONLY]cpu/intel/socket_mPGA604: Run romstage from CAR

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36564 )

Change subject: [TESTONLY]cpu/intel/socket_mPGA604: Run romstage from CAR
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Patch Set 2:

before:

0:1st timestamp                                     367
  13:starting to load romstage                         1,004,157 (1,003,790)
  14:finished loading romstage                         1,007,503 (3,346)
   1:start of rom stage                                1,035,148 (27,644)
   2:before ram initialization                         1,118,794 (83,645)
   3:after ram initialization                          1,901,509 (782,714)
   4:end of romstage                                   2,626,474 (724,965)

after:

0:1st timestamp                                     367
  13:starting to load romstage                         1,058,627 (1,058,259)
  14:finished loading romstage                         1,077,024 (18,396)
   1:start of rom stage                                1,104,382 (27,358)
   2:before ram initialization                         1,104,392 (9)
   3:after ram initialization                          1,355,040 (250,648)
   4:end of romstage                                   1,367,352 (12,311)

Times with CBMEM console only, about 500ms of romstage improvement is in printk().