[coreboot-gerrit] Change in coreboot[master]: [WIP] drivers/pc80/rtc: Reorganize prototypes

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38199 )

Change subject: [WIP] drivers/pc80/rtc: Reorganize prototypes
......................................................................

[WIP] drivers/pc80/rtc: Reorganize prototypes

Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976
Signed-off-by: Kyösti Mälkki 
---
A src/arch/x86/include/arch/post.h
M src/include/console/console.h
M src/include/pc80/mc146818rtc.h
M src/lib/bootblock.c
4 files changed, 41 insertions(+), 25 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/38199/1

diff --git a/src/arch/x86/include/arch/post.h b/src/arch/x86/include/arch/post.h
new file mode 100644
index 0000000..7bdf6a6
--- /dev/null
+++ b/src/arch/x86/include/arch/post.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __ARCH_POST_H__
+#define __ARCH_POST_H__
+
+#include <stdint.h>
+
+void cmos_post_init(void);
+void cmos_post_code(u8 value);
+void cmos_post_extra(u32 value);
+void cmos_post_path(const struct device *dev);
+int cmos_post_previous(u8 *code, u32 *extra);
+
+static inline void post_log_path(const struct device *dev)
+{
+	if (CONFIG(CMOS_POST) && dev)
+		cmos_post_path(dev);
+}
+
+static inline void post_log_clear(void)
+{
+	if (CONFIG(CMOS_POST))
+		cmos_post_extra(0);
+}
+
+#endif
diff --git a/src/include/console/console.h b/src/include/console/console.h
index 94642cd..12fb77a 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -19,6 +19,7 @@
 #include <stdint.h>
 #include <arch/cpu.h>
 #include <console/post_codes.h>
+#include <console/vtxprintf.h>

/* console.h is supposed to provide the log levels defined in here: */
 #include <commonlib/loglevel.h>
@@ -26,31 +27,10 @@
 #define RAM_DEBUG (CONFIG(DEBUG_RAM_SETUP) ? BIOS_DEBUG : BIOS_NEVER)
 #define RAM_SPEW  (CONFIG(DEBUG_RAM_SETUP) ? BIOS_SPEW  : BIOS_NEVER)

-#include <console/vtxprintf.h>
-
-struct device;
-
 void post_code(u8 value);
-void arch_post_code(u8 value);
-void cmos_post_code(u8 value);
-void cmos_post_extra(u32 value);
-void cmos_post_path(const struct device *dev);
-int cmos_post_previous(u8 *code, u32 *extra);
-
-static inline void post_log_path(const struct device *dev)
-{
-	if (CONFIG(CMOS_POST) && dev)
-		cmos_post_path(dev);
-}
-
-static inline void post_log_clear(void)
-{
-	if (CONFIG(CMOS_POST))
-		cmos_post_extra(0);
-}
-
-/* this function is weak and can be overridden by a mainboard function. */
 void mainboard_post(u8 value);
+void arch_post_code(u8 value);
+
 void __noreturn die(const char *fmt, ...);
 #define die_with_post_code(value, fmt, ...) \
    do { post_code(value); die(fmt, ##__VA_ARGS__); } while (0)
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index 353a09b..c9e054b 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -183,6 +183,5 @@

#endif /* CONFIG_ARCH_X86 */

-void cmos_post_init(void);

#endif /*  PC80_MC146818RTC_H */
diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c
index 386f4e3..5995c45 100644
--- a/src/lib/bootblock.c
+++ b/src/lib/bootblock.c
@@ -15,11 +15,11 @@
  */

#include <arch/exception.h>
+#include <arch/post.h>
 #include <bootblock_common.h>
 #include <console/console.h>
 #include <delay.h>
 #include <option.h>
-#include <pc80/mc146818rtc.h>
 #include <program_loading.h>
 #include <symbols.h>
 #include <timestamp.h>