Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36914 )
Change subject: AGESA, binaryPI: implement C bootblock ......................................................................
Patch Set 30:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36914/28/src/drivers/amd/agesa/boot... File src/drivers/amd/agesa/bootblock.c:
https://review.coreboot.org/c/coreboot/+/36914/28/src/drivers/amd/agesa/boot... PS28, Line 23: static void init_mmio(void)
Stoneyridge kept the amd_initmmio naming and does not carve out the MMIOCONF initialization from tha […]
Prepared a preceding patch that moves the stoneyridge implementation to the common AMD block.
https://review.coreboot.org/c/coreboot/+/36914/28/src/drivers/amd/agesa/boot... PS28, Line 40: set_var_mtrr(mtrr, OPTIMAL_CACHE_ROM_BASE, OPTIMAL_CACHE_ROM_SIZE,
I do not see how the previous implementation with amdlib and LibAmdMsrWrite could be better in this […]
Looped through all BKDGS for fam14h, fam15h and 16h until processors 30-3f. The MTRRs are shared across cores in the compute unit (i.e. 2 cores) for whole fam15h, so the statement about duplicates is true for the whole fam15h. fam14h and 16h processors 00-0f and 30-3f are not affected. Will try to solve this now.