[coreboot-gerrit] Change in coreboot[master]: nb/intel/sandybridge: Use one sequence for write leveling

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47614 )

Change subject: nb/intel/sandybridge: Use one sequence for write leveling
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47614/1/src/northbridge/intel/sandy... 
File src/northbridge/intel/sandybridge/raminit_common.c:

https://review.coreboot.org/c/coreboot/+/47614/1/src/northbridge/intel/sandy... 
PS1, Line 1725: if (ctrl->rank_mirror[channel][slotrank])
              : 		ddr3_mirror_mrreg(&bank, &mr1reg);
> This looks like a functional difference. […]

It isn't, but I'll add some logic lubricant. Hint: `ddr3_mirror_mrreg` was created in the immediately preceding commit