Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35237 )
Change subject: soc/intel/{cnl, icl}: Allocate 64KB as FSP heap ......................................................................
soc/intel/{cnl, icl}: Allocate 64KB as FSP heap
TEST=Build and boot CML-Hatch
With this CL No "Smashed stack detected in romstage" msg in serial log.
Change-Id: Icc39cdb71f427189186222ae53b8881cbbd5e0bc Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/icelake/Kconfig 2 files changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/35237/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index d949fff..ac100e2 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -125,6 +125,13 @@ The amount of anticipated stack usage in CAR by bootblock and other stages.
+config DCACHE_BSP_HEAP_SIZE + hex + depends on FSP_USES_CB_STACK + default 0x10000 + help + The amount of anticipated heap usage in CAR by FSP. + config IFD_CHIPSET string default "cnl" diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 1bd478c..78bd133 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -76,6 +76,13 @@ The amount of anticipated stack usage in CAR by bootblock and other stages.
+config DCACHE_BSP_HEAP_SIZE + hex + depends on FSP_USES_CB_STACK + default 0x10000 + help + The amount of anticipated heap usage in CAR by FSP. + config IFD_CHIPSET string default "icl"