[coreboot-gerrit] [S] Change in coreboot[main]: drivers/pc80/rtc/option.c: Reset only checked CMOS range during resume

[Bill XIE (Code Review)]

Attention is currently required from: Bill XIE, Jérémy Compostella, Nico Huber.

Hello Jonathon Hall, Jérémy Compostella, Nico Huber, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/78906?usp=email

to look at the new patch set (#6).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: drivers/pc80/rtc/option.c: Reset only checked CMOS range during resume
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drivers/pc80/rtc/option.c: Reset only checked CMOS range during resume

Proposed in the comment of commit 29030d0f3dad
("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"),
during sanitize_cmos(), only reset CMOS range covered by checksum and
the checksum itself from the file cmos.default in CBFS during s3
resume, in order to prevent other runtime data in CMOS (e.g. the DRAM
training data on GM45 platforms for s3 resume) being erased, while the
whole CMOS after 14 could be reset during normal boot.

Tested: cherry-pick this commit before commit 44a48ce7a46c ("Kconfig:
    Bring HEAP_SIZE to a common, large value"), which is already
    before my commit 29030d0f3dad , Thinkpad X200 with
    CONFIG(STATIC_OPTION_TABLE) can resume from s3 again,
    indicating that DRAM training data are no longer erased.

Signed-off-by: Bill XIE 
Co-authored-by: Jonathon Hall 
Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a
---
M src/drivers/pc80/rtc/option.c
1 file changed, 12 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/78906/6