[coreboot-gerrit] [M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes

[Nicholas Chin (Code Review)]

Attention is currently required from: Angel Pons, Keith Hui.

Nicholas Chin has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email )

Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
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Patch Set 5:

(1 comment)

File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c:

https://review.coreboot.org/c/coreboot/+/85413/comment/c03c7b91_609b61b7?usp... :
PS2, Line 77: {7, 34, 20, -1}
> Sadly this can still not get the card on PCIEX1_2 work. […]

The `overridetree.cb` still specifies `drq 0xe4 = 0xfc` for `device pnp 2e.f`, so it's changing back the push pull register to the old value. I would either remove that register from the overridetree or set it to 0x8c as well.