Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13304
-gerrit
commit d4a9a4a556762a6bc94a2c8686628f7e881ce2e4 Author: Alexandru Gagniuc mr.nuke.me@gmail.com Date: Mon Oct 5 13:45:22 2015 -0700
soc/apollolake: Add minimal accessors for sideband bus (IOSF)
Some configuration registers for the UART are placed behind the sideband bus.
Change-Id: I84a620dbd0cf4b8f3fec119836d1c8f75c7f200a Signed-off-by: Alexandru Gagniuc alexandrux.gagniuc@intel.com --- src/soc/intel/apollolake/include/soc/iosf.h | 30 +++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+)
diff --git a/src/soc/intel/apollolake/include/soc/iosf.h b/src/soc/intel/apollolake/include/soc/iosf.h new file mode 100644 index 0000000..c9f578c --- /dev/null +++ b/src/soc/intel/apollolake/include/soc/iosf.h @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Alexandru Gagniuc alexandrux.gagniuc@intel.com for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _SOC_APOLLOLAKE_IOSF_H_ +#define _SOC_APOLLOLAKE_IOSF_H_ + +#include <arch/io.h> + +inline static void iosf_write(uint8_t port, uint16_t reg, uint32_t val) +{ + uintptr_t base = CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3); + write32((void *)base, val); +} + +inline static uint32_t iosf_read(uint8_t port, uint16_t reg) +{ + uintptr_t base = CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3); + return read32((void *)base); +} + +#endif /* _SOC_APOLLOLAKE_IOSF_H_ */