[coreboot-gerrit] Patch merged into coreboot/master: 31ac9e3 baytrail: Configure MSR for 2-core and 4-core P-state configutation

the following patch was just integrated into master:
commit 31ac9e3a9a53523ad342af55b9a20c3c51cd927a
Author: Duncan Laurie 
Date:   Fri Mar 28 10:52:13 2014 -0700

baytrail: Configure MSR for 2-core and 4-core P-state configutation

Suggested settings to try for performace regression:

2-core systems:
    - MSR_PMG_CST_CONFIG_CONTROL clear bit 11 (SINGLE_PCTL)
    - MSR_POWER_MISC clear bit 2,3
    - _PR.CPUx._PSD coordination set to 0xFE (HW_ALL)

4-core systems:
    - MSR_PMG_CST_CONFIG_CONTROL clear bit 11 (SINGLE_PCTL)
    - MSR_POWER_MISC clear bit 2,3
    - _PR.CPUx._PSD coordination set to 0xFC (SW_ALL)

BUG=chrome-os-partner:26211
    BRANCH=baytrail
    TEST=emerge-rambi chromeos-coreboot-rambi

Change-Id: Ib68a86525204ae47a820c269257a7b8df9300a6a
    Signed-off-by: Duncan Laurie 
    Reviewed-on: https://chromium-review.googlesource.com/192573
    Tested-by: Shawn Nematbakhsh 
    Commit-Queue: Shawn Nematbakhsh 
    (cherry picked from commit 8c8c0be0000043610eaa56926eff978f352819b8)
    Signed-off-by: Marc Jones 
    Reviewed-on: http://review.coreboot.org/7213
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi

See http://review.coreboot.org/7213 for details.

-gerrit