Antonello Dettori (dev@dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16370
-gerrit
commit 8938e9fd763f1ea1bb3d9fee8be771ab083d7012 Author: Antonello Dettori dev@dettori.io Date: Tue Aug 30 22:05:32 2016 +0200
southbridge/intel/i82801gx: transition away from device_t
Replace the use of the old device_t definition inside southbridge/intel/i82801gx.
The patch has been tested both with the arch/io.h definition of device_t enabled and disabled in order to ensure compatibility while the transaction takes place.
Change-Id: Ia257318a7068b54739f319bfbba35f2a07826940 Signed-off-by: Antonello Dettori dev@dettori.io --- src/southbridge/intel/i82801gx/early_smbus.c | 2 +- src/southbridge/intel/i82801gx/i82801gx.h | 2 ++ src/southbridge/intel/i82801gx/smihandler.c | 2 +- 3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index 2f9cdeb..47fe5f6 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -23,7 +23,7 @@
void enable_smbus(void) { - device_t dev; + pci_devfn_t dev;
/* Set the SMBus device statically. */ dev = PCI_DEV(0x0, 0x1f, 0x3); diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index d4adc18..48b9d3b 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -43,7 +43,9 @@ #if !defined(__ASSEMBLER__) #if !defined(__PRE_RAM__) #include "chip.h" +#if !defined(__SIMPLE_DEVICE__) extern void i82801gx_enable(device_t dev); +#endif void gpi_route_interrupt(u8 gpi, u8 mode); #else void enable_smbus(void); diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index d3867a5..c6425db 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -276,7 +276,7 @@ static void busmaster_disable_on_bus(int bus) for (slot = 0; slot < 0x20; slot++) { for (func = 0; func < 8; func++) { u32 reg32; - device_t dev = PCI_DEV(bus, slot, func); + pci_devfn_t dev = PCI_DEV(bus, slot, func);
val = pci_read_config32(dev, PCI_VENDOR_ID);