HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45072 )
Change subject: include/device/pci_def.h: Update PCI capabilitys ......................................................................
include/device/pci_def.h: Update PCI capabilitys
Change-Id: I3bb0946895aac3fc4cfdc6e6efffbb6d22e059a5 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/include/device/pci_def.h 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/45072/1
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h index 25372bf..2a13e2a 100644 --- a/src/include/device/pci_def.h +++ b/src/include/device/pci_def.h @@ -202,6 +202,10 @@ #define PCI_CAP_ID_SSVID 0x0D /* Bridge subsystem vendor/device ID */ #define PCI_CAP_ID_PCIE 0x10 /* PCI Express */ #define PCI_CAP_ID_MSIX 0x11 /* MSI-X */ +#define PCI_CAP_ID_SATA 0x12 /* Serial ATA Data/Index Configuration */ +#define PCI_CAP_ID_AF 0x13 /* Advanced Features (AF) */ +#define PCI_CAP_ID_ENHANCED 0x14 /* Enhanced Allocation */ +#define PCI_CAP_ID_FLATTENING 0x15 /* Flattening Portal Bridge */ #define PCI_CAP_LIST_NEXT 1 /* Next capability in the list */ #define PCI_CAP_FLAGS 2 /* Capability defined flags (16 bits) */