Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/28740
Change subject: soc/intel/cannonlake: Move SkipMpInit config to FSPM ......................................................................
soc/intel/cannonlake: Move SkipMpInit config to FSPM
SkipMpInit UPD had ben moved from Fsp SiliconInit UPD to Fsp MemoryInit UPD, hence change the settings in coreboot side as well. The old options in SiliconInit get deprecated, so leave the code as is will be harmless. Make the changes limited to coffeelake itself.
Change-Id: If968de78117068668e4f0006c412442c50658ba9 Signed-off-by: Lijian Zhao lijian.zhao@intel.com --- M src/soc/intel/cannonlake/romstage/romstage.c 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28740/1
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index ae1ba4d..8bdabbf 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -22,6 +22,7 @@ #include <compiler.h> #include <console/console.h> #include <fsp/util.h> +#include <intelblocks/chip.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> #include <memory_info.h> @@ -175,6 +176,9 @@ m_cfg->VmxEnable = 0; else m_cfg->VmxEnable = config->VmxEnable; +#if IS_ENABLED(CONFIG_SOC_INTEL_COFFEELAKE) + m_cfg->SkipMpInit = !chip_get_fsp_mp_init(); +#endif }
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)