build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44716 )
Change subject: soc/mediatek/mt8192: Do dramc command bus training ......................................................................
Patch Set 1:
(30 comments)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_dvfs.c:
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 197: void shuffle_dfs_to_fsp1(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 114: u8 get_cbt_vref_pinmux_value(const struct ddr_cali* cali, u8 range, u8 vref_lev) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 596: static void ca_training_set_perbit_delay_cell(const struct ddr_cali* cali, "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 602: for (u8 u1CA = 0;u1CA < CA_NUM_LP4;u1CA++) { space required after that ';' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 602: for (u8 u1CA = 0;u1CA < CA_NUM_LP4;u1CA++) { space required after that ';' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 747: static s16 adjust_cs_ui(const struct ddr_cali* cali, u32 cs_mck, u32 cs_ui, s16 pi_dly) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 750: s16 p2u,ui = 0, pi = 0; space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 789: static s8 adjust_ca_ui(const struct ddr_cali* cali, u32 ca_mck, u32 ca_ui, s16 pi_dly) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 812: static void cbt_set_ca_clk_result(const struct ddr_cali* cali, u32 mck, u32 ui) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 839: static void cbt_adjust_cs(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 869: static void set_dram_mr_cbt_on_off(const struct ddr_cali* cali, o1_state o1) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 877: u8 mr13 = mr_value->mr13[rank] & (~ BIT(0)) & (~ BIT(6)) & (~ BIT(7)) ; space prohibited after that '~' (ctx:BxW)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 877: u8 mr13 = mr_value->mr13[rank] & (~ BIT(0)) & (~ BIT(6)) & (~ BIT(7)) ; space prohibited after that '~' (ctx:BxW)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 877: u8 mr13 = mr_value->mr13[rank] & (~ BIT(0)) & (~ BIT(6)) & (~ BIT(7)) ; space prohibited after that '~' (ctx:BxW)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 877: u8 mr13 = mr_value->mr13[rank] & (~ BIT(0)) & (~ BIT(6)) & (~ BIT(7)) ; space prohibited before semicolon
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 898: void o1_path_on_off(const struct ddr_cali* cali, o1_state o1) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 937: static void dramc_mode_reg_ca_term(const struct ddr_cali* cali, u8 do_term) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 960: mr13 = mr_value->mr13[rk] & (~ BIT(6)) & (~ BIT(7)); space prohibited after that '~' (ctx:BxW)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 960: mr13 = mr_value->mr13[rk] & (~ BIT(6)) & (~ BIT(7)); space prohibited after that '~' (ctx:BxW)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 984: static void cbt_entry(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1020: mr13 &= (~ BIT(7)); space prohibited after that '~' (ctx:BxW)
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1028: static void cbt_exit(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1050: static void cbt_entry_top(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1057: if(fsp == FSP_1) { space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1070: if(fsp == FSP_1) space required before the open parenthesis '('
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1074: static void cbt_exit_top(const struct ddr_cali* cali, cbt_state state) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1076: if (state == OUT_CBT || get_cbt_mode(cali) == CBT_BYTE_MODE1){ space required before the open brace '{'
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1083: static void cbt_set_vref(const struct ddr_cali* cali, cbt_state state) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1128: static void cbt_set_best_vref(const struct ddr_cali* cali, cbt_state state) "foo* bar" should be "foo *bar"
https://review.coreboot.org/c/coreboot/+/44716/1/src/soc/mediatek/mt8192/dra... PS1, Line 1227: void dramc_cmd_bus_training(const struct ddr_cali* cali) "foo* bar" should be "foo *bar"