[coreboot-gerrit] Change in ...coreboot[master]: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33506

Change subject: sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers
......................................................................

sb/intel/common/spi.c: Add a pointer to the ich7 SPI registers

Change-Id: I7509dc2124ee7057af075c7d0607ec615b930fa3
Signed-off-by: Arthur Heymans 
---
M src/southbridge/intel/common/spi.c
1 file changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/33506/1

diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 5a4b26f..f447515 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -92,7 +92,10 @@
    uint32_t flcomp;
    uint32_t hsfs;

-	struct ich9_spi_regs *ich9_spi;
+	union {
+		struct ich9_spi_regs *ich9_spi;
+		struct ich7_spi_regs *ich7_spi;
+	};
    uint8_t *opmenu;
    int menubytes;
    uint16_t *preop;
@@ -283,6 +286,7 @@
    rcrb = (uint8_t *)(rcba & 0xffffc000);
    if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) {
    	ich7_spi = (struct ich7_spi_regs *)(rcrb + 0x3020);
+		cntlr->ich7_spi = ich7_spi;
    	cntlr->opmenu = ich7_spi->opmenu;
    	cntlr->menubytes = sizeof(ich7_spi->opmenu);
    	cntlr->optype = &ich7_spi->optype;