[coreboot-gerrit] [XL] Change in coreboot[main]: mb/emulation: Add SIMICS QSP support

[Benjamin Doron (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Lean Sheng Tan, Leon Groß, Nico Huber, Patrick Rudolph, Paul Menzel.

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email )

Change subject: mb/emulation: Add SIMICS QSP support
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Patch Set 15:

(3 comments)

File src/mainboard/emulation/simics-qsp/northbridge.c:

https://review.coreboot.org/c/coreboot/+/77905/comment/c0becd16_04c76118 :
PS7, Line 140: len += simics_get_smbios_data19(*handle + 2, *handle, current);
> Any reason you're adding this here? All other boards use common code for type19

From memory, the common code needs some CBMEM mem info table to be able to generate the memory-related SMBIOS tables. Maybe generate that instead of writing SMBIOS here?

File src/mainboard/emulation/simics-qsp/northbridge.c:

https://review.coreboot.org/c/coreboot/+/77905/comment/15db2e91_05ec2ce0 :
PS15, Line 153: if (!is_pci_dev_on_bus(dev, 0))
              : 		return NULL;
This looks unnecessary, if it falls-through it also returns NULL. Was this copied?

https://review.coreboot.org/c/coreboot/+/77905/comment/f0a7fc21_9c7a27f4 :
PS15, Line 172: static int fw_cfg_max_cpus(void)
              : {
              : 	return 1;
              : }
This is (probably) incorrect, and misleads MP init.