[coreboot-gerrit] Change in coreboot[master]: soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set

[Wim Vervoorn (Code Review)]

Hello Patrick Rudolph, Frans Hendriks, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38746

to look at the new patch set (#2).

Change subject: soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set
......................................................................

soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is set

DMI PCR 2770 (LPC IO DECODE RANGES) should be identical to LPC PCI
offset 0x80. This is specified in PCH BWG par 2.5.1.5.

Add the support to make sure this PCR is always set correctly.

BUG=N/A
TEST=tested on facebook monolith.

Change-Id: I33ff2b96dea78b5ff1c7c9416cf74f67d79f265d
Signed-off-by: Wim Vervoorn 
---
M src/soc/intel/cannonlake/bootblock/pch.c
M src/soc/intel/icelake/bootblock/pch.c
M src/soc/intel/skylake/bootblock/pch.c
M src/soc/intel/tigerlake/bootblock/pch.c
4 files changed, 21 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/38746/2