[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/cmn/cse: Support CSE sync from payload

[Kapil Porwal (Code Review)]

Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82660?usp=email )

Change subject: soc/intel/cmn/cse: Support CSE sync from payload
......................................................................

soc/intel/cmn/cse: Support CSE sync from payload

Skip CSE sync in coreboot when payload is doing it.

BUG=b:305898363
TEST=Verify CSE sync from depthcharge on Screebo

Change-Id: Ifa942576c803b8ec9e1e59c61917a14154fb94b2
Signed-off-by: Kapil Porwal 
---
M src/soc/intel/common/block/cse/Kconfig
M src/soc/intel/common/block/cse/cse_lite.c
2 files changed, 16 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/82660/1

diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index b0524ea..edc7e23 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -150,6 +150,16 @@
      In this case, the HECI interface needs to stay visible and the payload must support
      sending commands to CSE.

+config SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD
+	bool
+	depends on SOC_INTEL_COMMON_BLOCK_CSE
+	help
+	  Use this config to specify that the payload will update the CSE RW partition instead
+	  of coreboot.
+
+	  In this case, CSE shall not switch to RW partition and the payload must support
+	  CSE RW update.
+
 config SOC_INTEL_CSE_LITE_SKU
    bool
    default n
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 3579bce..6e5b451 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -923,6 +923,9 @@
    if (!CONFIG(SOC_INTEL_CSE_RW_UPDATE))
    	return false;

+	if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD))
+		return false;
+
    if (CONFIG(SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE))
    	return !is_debug_cse_fw_update_disable();

@@ -1499,6 +1502,9 @@

void cse_fw_sync(void)
 {
+	if (CONFIG(SOC_INTEL_CSE_LITE_SYNC_BY_PAYLOAD))
+		return;
+
    timestamp_add_now(TS_CSE_FW_SYNC_START);
    do_cse_fw_sync();
    timestamp_add_now(TS_CSE_FW_SYNC_END);