[coreboot-gerrit] Change in coreboot[master]: Revert "src/soc/intel/cannonlake: Update C-state latency control limits"

[Nico Huber (Code Review)]

Attention is currently required from:  Felix Singer, Bora Guvendik, Lijian Zhao, Shaunak Saha, Martin Roth, Michael Niewöhner, Tim Wawrzynczak, Vaibhav Shankar, Aaron Durbin, Patrick Rudolph.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56662 )

Change subject: Revert "src/soc/intel/cannonlake: Update C-state latency control limits"
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/56662/comment/88ef3fd1_82b4b5cb 
PS1, Line 14:
> It should work therotically, if you have made all the changes to match that of soc/skylake.  […]

Alas, I don't have the hardware to confirm the S0ix status.