[coreboot-gerrit] Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Tim Crawford, Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph.
Hello Tim Crawford, build bot (Jenkins), Cliff Huang, Cliff Huang, Subrata Banik, Maulik V Vaghela, Subrata Banik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/60183

to look at the new patch set (#5).

Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
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soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs

The PMC IPC method that is used for RTD3 support expects to be provided
the virtual wire index instead of the LCAP PN for CPU PCIe RPs.
Therefore, use the prior patches to update pcie_rp for CPU RPs.

Note that an unused argument to pcie_rtd3_acpi_method_status() was also
dropped.

BUG=b:197983574
TEST=add rtd3 node under pcie4_0 in overridetree for brya0, boot and
inspect the SSDT to see the PMC IPC parameters are as expected for the
CPU RP, and the ModPhy power gating code is not found in the AML for the
PEG port.

Signed-off-by: Tim Wawrzynczak 
Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873
---
M src/soc/intel/common/block/pcie/rtd3/rtd3.c
1 file changed, 29 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/60183/5