Huayang Duan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34332 )
Change subject: mediatek/mt8183: Support DDR frequency 3600Mbps
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Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34332/12/src/soc/mediatek/mt8183/dr...
File src/soc/mediatek/mt8183/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/34332/12/src/soc/mediatek/mt8183/dr...
PS12, Line 177: (0x1 << 29) | (0x0 << 4) | (0x1 << 0));
exceed col 80
I see the check-patch script only complain line over 96 characters, so to reduce the line count,move some 2-line to 1-line
https://review.coreboot.org/c/coreboot/+/34332/12/src/soc/mediatek/mt8183/in...
File src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h:
https://review.coreboot.org/c/coreboot/+/34332/12/src/soc/mediatek/mt8183/in...
PS12, Line 59: LP4X_MIDDLE_FREQ
not used anywhere?
DVFS feature will using 3 freq, that is low,middle,high freq.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Ic1378ca43fb333c445ca77e7dc0844cdf65f2207
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