[coreboot-gerrit] Change in coreboot[master]: soc/mediatek/mt8192: Add SPI flash controller dual read function

[CK HU (Code Review)]

CK HU has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44852 )

Change subject: soc/mediatek/mt8192: Add SPI flash controller dual read function
......................................................................

soc/mediatek/mt8192: Add SPI flash controller dual read function

Support SPI flash dual read funciton which change spi mode (1-1-1)
to dual mode (1-1-2).

Signed-off-by: CK Hu 
Change-Id: Iabd3668fc4bc42137b7743144fc1cced4fe72737
---
M src/soc/mediatek/mt8192/flash_controller.c
M src/soc/mediatek/mt8192/include/soc/flash_controller.h
2 files changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/44852/1

diff --git a/src/soc/mediatek/mt8192/flash_controller.c b/src/soc/mediatek/mt8192/flash_controller.c
index 0c37ae5..d1e5acb 100644
--- a/src/soc/mediatek/mt8192/flash_controller.c
+++ b/src/soc/mediatek/mt8192/flash_controller.c
@@ -144,6 +144,9 @@
    size_t dma_buf_len = REGION_SIZE(dma_coherent);
    u32 next;

+	setbits8(&mt8192_nor->read_dual, SFLASH_READ_DUAL_EN);
+	write8(&mt8192_nor->prgdata[3], SFLASH_1_1_2_READ);
+
    if (!IS_ALIGNED((uintptr_t)addr, SFLASH_DMA_ALIGN)) {
    	next = MIN(ALIGN_UP((uintptr_t)addr, SFLASH_DMA_ALIGN) -
    		   (uintptr_t)addr, len);
diff --git a/src/soc/mediatek/mt8192/include/soc/flash_controller.h b/src/soc/mediatek/mt8192/include/soc/flash_controller.h
index 5655a9c..16e1c31 100644
--- a/src/soc/mediatek/mt8192/include/soc/flash_controller.h
+++ b/src/soc/mediatek/mt8192/include/soc/flash_controller.h
@@ -7,6 +7,9 @@
 #include <stdint.h>
 #include <soc/addressmap.h>

+#define SFLASH_READ_DUAL_EN 0x1
+#define SFLASH_1_1_2_READ 0x3B
+
 enum {
    SFLASH_POLLINGREG_US	  = 500000,
    SFLASH_WRBUF_SIZE	  = 128,