[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48423 )

Change subject: soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP
......................................................................

soc/intel/common: Check sizes of CSE CBFS RW blob and CSE RW BP

The patch triggeres CrOS recovery mode if the sizes of CSE CBFS RW blob
and CSE RW boot are different.

TEST=Verified on drawcia.

Signed-off-by: Sridhar Siricilla 
Change-Id: I8be589eae905b1a54a8cf981ccd3a00bd5e733f5
---
M src/soc/intel/common/block/cse/cse_lite.c
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/48423/1

diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index eb4be6e..535b9fd 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -74,6 +74,9 @@

/* CSE CBFS RW metadata is not found */
    CSE_LITE_SKU_RW_METADATA_NOT_FOUND = 10,
+
+	/* CSE CBFS RW blob layout is not correct */
+	CSE_LITE_SKU_LAYOUT_MISMATCH_ERROR = 11,
 };

/*
@@ -674,6 +677,8 @@
    	const void *cse_cbfs_rw, const size_t cse_blob_sz,
    	struct region_device *target_rdev)
 {
+	if (region_device_sz(target_rdev) != cse_blob_sz)
+		return CSE_LITE_SKU_LAYOUT_MISMATCH_ERROR;

if (!cse_erase_rw_region(target_rdev))
    	return CSE_LITE_SKU_FW_UPDATE_ERROR;