[coreboot-gerrit] Change in coreboot[master]: amd/fam15tn/gcccar.inc: Fix msr access with clang

[Arthur Heymans (Code Review)]

Attention is currently required from: Arthur Heymans.
Hello Arthur Heymans,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/63044

to review the following change.

Change subject: amd/fam15tn/gcccar.inc: Fix msr access with clang
......................................................................

amd/fam15tn/gcccar.inc: Fix msr access with clang

Change-Id: I21bebd475dce373a77626d2e78a0ab10678ea8b6
Signed-off-by: Arthur Heymans 
---
M src/vendorcode/amd/agesa/f15tn/gcccar.inc
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/63044/1

diff --git a/src/vendorcode/amd/agesa/f15tn/gcccar.inc b/src/vendorcode/amd/agesa/f15tn/gcccar.inc
index 5a0c1c4..fb49c17 100644
--- a/src/vendorcode/amd/agesa/f15tn/gcccar.inc
+++ b/src/vendorcode/amd/agesa/f15tn/gcccar.inc
@@ -971,9 +971,9 @@
 1:  #.if (al == 01h)				# TN only
     #Enable MSRC001_001F[EnableCf8ExtCfg]
     mov     $NB_CFG, %ecx    # MSR:C001_001F
-    _rdmsr
+    _RDMSR
     bts     $(ENABLE_CF8_EXT_CFG - 32), %edx
-    _wrmsr
+    _WRMSR
     # Set F3x44[6, CpuErrDis] = 1
     MAKE_EXT_PCI_ADDR  0, 0, 24, FUNC_3, 0x44 //MCA_NB_CFG
     //mov $(1 << 31 | 2 << 28 | (((MCA_NB_CFG) & (0x0F00)) >> 8) << 24 | 2 << 16 | 1 << 11 | FUNC_3 << 8), %eax