Attention is currently required from: Patrick Rudolph.
Hello Jérémy Compostella, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/86580?usp=email
to look at the new patch set (#2).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: cpu/x86/64bit: Allow to map more of the address space ......................................................................
cpu/x86/64bit: Allow to map more of the address space
On AMD platforms the SPI flash can be accessed using the ROM3 mapping in upper MMIO space. To reach the MMIO window the default page tables must be extended to cover the address by default.
Add support for a SoC specific default address space being used on x86_64, where the default of 4GiB/512GiB remains. The size can be specified by the Kconfig CPU_PT_ROM_MAP_GB option.
Used in the following patch to use ROM3 mapping on AMD platforms.
TEST: Access ROM3 bar at 0xfd00000000 on amd/birman+ using x86_64 TEST: x86_64 still works on qemu/q35.
Change-Id: If669426f2b5ae40dd5c62e17f3a0234783b7d462 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/cpu/x86/64bit/pt.S M src/cpu/x86/64bit/pt1G.S M src/cpu/x86/Kconfig 3 files changed, 31 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/86580/2