[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.

[Patrick Georgi (Code Review)]

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32791 )

Change subject: soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.
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Patch Set 6:

(1 comment)

https://review.coreboot.org/#/c/32791/6/src/soc/intel/cannonlake/fsp_params.... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/#/c/32791/6/src/soc/intel/cannonlake/fsp_params.... 
PS6, Line 137: 			*defaultcs = 0;
             : 			*enable = 1;
Add NULL-checks and you can use the same function in both cases