Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51765 )
Change subject: mb/intel/adlrvp: Remove static VBT stitching ......................................................................
mb/intel/adlrvp: Remove static VBT stitching
Currently, we used to stitch extra VBT files to ADLRVP build using Makefile. With enablement of emerge build, we should be able to integrate more than 1 VBT binaries using ebuild.
This removing these lines to avoid compilation issues in emerge builds
BUG=None BRANCH=None TEST=Check if compilation passes on emerge build. Stitched additional VBT files using emerge and checked that coreboot picks up correct VBT.
Change-Id: I69f1cc6c07415515ff85180fdd7cc5de11b4d805 Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/51765 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: Meera Ravindranath meera.ravindranath@intel.com Reviewed-by: Rizwan Qureshi rizwan.qureshi@intel.com --- M src/mainboard/intel/adlrvp/Makefile.inc 1 file changed, 0 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Rizwan Qureshi: Looks good to me, approved Subrata Banik: Looks good to me, approved Meera Ravindranath: Looks good to me, but someone else must approve
diff --git a/src/mainboard/intel/adlrvp/Makefile.inc b/src/mainboard/intel/adlrvp/Makefile.inc index 12f546b..75c8cf8 100644 --- a/src/mainboard/intel/adlrvp/Makefile.inc +++ b/src/mainboard/intel/adlrvp/Makefile.inc @@ -19,11 +19,6 @@ ramstage-y += board_id.c ramstage-y += gpio.c
-ifeq ($(CONFIG_INTEL_GMA_ADD_VBT),y) -$(call add_vbt_to_cbfs, vbt_lp5.bin, 3rdparty/blobs/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/vbt_lp5.bin) -$(call add_vbt_to_cbfs, vbt_ddr5.bin, 3rdparty/blobs/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/vbt_ddr5.bin) -endif - CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
subdirs-y += variants/$(VARIANT_DIR)