[coreboot-gerrit] Change in coreboot[master]: mb/intel/tglrvp: Update Kconfig

[Wonkyu Kim (Code Review)]

Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38148 )

Change subject: mb/intel/tglrvp: Update Kconfig
......................................................................

mb/intel/tglrvp: Update Kconfig

Update Kconfig to add Tigerlake RVP board specific configs.

BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board

Signed-off-by: Wonkyu Kim 
Change-Id: Ia63c06e3b4b4effcace7a8458b1066a615de2008
---
M src/mainboard/intel/tglrvp/Kconfig
1 file changed, 36 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38148/1

diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig
index bee72cf..45093f0 100644
--- a/src/mainboard/intel/tglrvp/Kconfig
+++ b/src/mainboard/intel/tglrvp/Kconfig
@@ -3,19 +3,24 @@
 config BOARD_SPECIFIC_OPTIONS
    def_bool y
    select BOARD_ROMSIZE_KB_32768
-	select EC_ACPI
-	select GENERIC_SPD_BIN
    select HAVE_ACPI_RESUME
    select HAVE_ACPI_TABLES
    select MAINBOARD_HAS_CHROMEOS
-	select GENERIC_SPD_BIN
    select DRIVERS_I2C_HID
    select DRIVERS_I2C_GENERIC
+	select DRIVERS_I2C_MAX98373
    select DRIVERS_USB_ACPI
+	select DRIVERS_SPI_ACPI
+	select GENERATE_SMBIOS_TABLES
    select SOC_INTEL_TIGERLAKE
-	select MAINBOARD_USES_IFD_EC_REGION
    select INTEL_LPSS_UART_FOR_CONSOLE

+config CHROMEOS
+        bool
+        default y
+        select GBB_FLAG_FORCE_DEV_SWITCH_ON
+        select GBB_FLAG_FORCE_DEV_BOOT_USB
+
 config MAINBOARD_DIR
    string
    default "intel/tglrvp"
@@ -24,6 +29,11 @@
    string
    default "tglrvp_up3" if BOARD_INTEL_TGLRVP_UP3

+config GBB_HWID
+	string
+	depends on CHROMEOS
+	default "TGLRVP" if BOARD_INTEL_TGLRVP_UP3
+
 config MAINBOARD_PART_NUMBER
    string
    default "tglrvp"
@@ -44,9 +54,31 @@
    int
    default 512

+choice TGL_EC
+	prompt "ON BOARD EC"
+	default TGL_CHROME_EC
+	help
+	  This option allows you to select the on board EC to use.
+	  Select whether the board  has Intel EC or Chrome EC
+
+config TGL_CHROME_EC
+	bool "Chrome EC"
+	select EC_GOOGLE_CHROMEEC
+	select EC_GOOGLE_CHROMEEC_ESPI
+	select EC_GOOGLE_CHROMEEC_BOARDID
+	select EC_ACPI
+
+config TGL_INTEL_EC
+	bool "Intel EC"
+	select EC_ACPI
+	select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
+endchoice
+
 config VBOOT
    select VBOOT_LID_SWITCH
    select VBOOT_MOCK_SECDATA
+	select HAS_RECOVERY_MRC_CACHE
+	select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN

config UART_FOR_CONSOLE
    int