[coreboot-gerrit] Change in ...coreboot[master]: soc/{amd,intel}/chip: Use local include for chip.h

[HAOUAS Elyes (Code Review)]

Hello Kyösti Mälkki, Patrick Rudolph, York Yang, Philipp Deppenwiese, build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32014

to look at the new patch set (#8).

Change subject: soc/{amd,intel}/chip: Use local include for chip.h
......................................................................

soc/{amd,intel}/chip: Use local include for chip.h

Change-Id: Ic1fcbf4b54b7d0b5cda04ca9f7fc145050c867b8
Signed-off-by: Elyes HAOUAS 
---
M 3rdparty/fsp
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/northbridge.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/intel/braswell/chip.c
M src/soc/intel/braswell/include/soc/ramstage.h
M src/soc/intel/braswell/romstage/romstage.c
M src/soc/intel/cannonlake/acpi.c
M src/soc/intel/cannonlake/chip.c
M src/soc/intel/cannonlake/cpu.c
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/cannonlake/include/soc/ramstage.h
M src/soc/intel/cannonlake/memmap.c
M src/soc/intel/cannonlake/pmc.c
M src/soc/intel/cannonlake/romstage/fsp_params.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/cannonlake/smihandler.c
M src/soc/intel/fsp_broadwell_de/acpi.c
M src/soc/intel/fsp_broadwell_de/chip.c
M src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c
M src/soc/intel/fsp_broadwell_de/southcluster.c
M src/soc/intel/icelake/acpi.c
M src/soc/intel/icelake/chip.c
M src/soc/intel/icelake/cpu.c
M src/soc/intel/icelake/finalize.c
M src/soc/intel/icelake/include/soc/ramstage.h
M src/soc/intel/icelake/memmap.c
M src/soc/intel/icelake/pmc.c
M src/soc/intel/icelake/romstage/romstage.c
M src/soc/intel/icelake/smihandler.c
M src/soc/intel/quark/include/soc/ramstage.h
M src/soc/intel/skylake/acpi.c
M src/soc/intel/skylake/bootblock/pch.c
M src/soc/intel/skylake/chip.c
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/finalize.c
M src/soc/intel/skylake/include/fsp11/soc/ramstage.h
M src/soc/intel/skylake/include/fsp20/soc/ramstage.h
M src/soc/intel/skylake/memmap.c
M src/soc/intel/skylake/pei_data.c
M src/soc/intel/skylake/pmc.c
M src/soc/intel/skylake/romstage/romstage.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
M src/soc/intel/skylake/thermal.c
46 files changed, 91 insertions(+), 47 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/32014/8