[coreboot-gerrit] Change in coreboot[master]: sb/intel/bd82x6x: Relocate intel_me_finalize_smm()

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42051 )

Change subject: sb/intel/bd82x6x: Relocate intel_me_finalize_smm()
......................................................................

sb/intel/bd82x6x: Relocate intel_me_finalize_smm()

This allows us to reduce the scope of three functions.

Change-Id: Ib08c0eb4b01e10aa38efac434ff23a488e9e2787
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/bd82x6x/me.c
M src/southbridge/intel/bd82x6x/me.h
M src/southbridge/intel/bd82x6x/me_common.c
3 files changed, 18 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/42051/1

diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index 7910623..dd3ecd7 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -109,22 +109,7 @@
    return 0;
 }

-#ifdef __SIMPLE_DEVICE__
-
-void intel_me_finalize_smm(void)
-{
-	u32 did = pci_read_config32(PCH_ME_DEV, PCI_VENDOR_ID);
-	switch (did) {
-	case 0x1c3a8086:
-	case 0x1e3a8086:
-		me_finalize_smm();
-		break;
-	default:
-		printk(BIOS_ERR, "No finalize handler for ME %08x.\n", did);
-	}
-}
-
-#else /* !__SIMPLE_DEVICE__ */
+#ifndef __SIMPLE_DEVICE__

/* Determine the path that we should take based on ME status */
 static me_bios_path intel_me_path(struct device *dev)
diff --git a/src/southbridge/intel/bd82x6x/me.h b/src/southbridge/intel/bd82x6x/me.h
index 8fee899..29d5749 100644
--- a/src/southbridge/intel/bd82x6x/me.h
+++ b/src/southbridge/intel/bd82x6x/me.h
@@ -243,9 +243,7 @@
    	 void *req_data, void *rsp_data, int rsp_bytes);

int mkhi_end_of_post(void);
-void update_mei_base_address(void);
-bool is_mei_base_address_valid(void);
-void me_finalize_smm(void);
+void intel_me_finalize_smm(void);
 int intel_mei_setup(struct device *dev);
 int intel_me_extend_valid(struct device *dev);
 void intel_me_hide(struct device *dev);
@@ -258,8 +256,6 @@
 int intel_early_me_uma_size(void);
 int intel_early_me_init_done(u8 status);

-void intel_me_finalize_smm(void);
-
 typedef struct {
    u32       major_version  : 16;
    u32       minor_version  : 16;
diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c
index 9088d44..59c0b38 100644
--- a/src/southbridge/intel/bd82x6x/me_common.c
+++ b/src/southbridge/intel/bd82x6x/me_common.c
@@ -351,17 +351,17 @@

#ifdef __SIMPLE_DEVICE__

-void update_mei_base_address(void)
+static inline void update_mei_base_address(void)
 {
    mei_base_address = (u32 *)(pci_read_config32(PCH_ME_DEV, PCI_BASE_ADDRESS_0) & ~0xf);
 }

-bool is_mei_base_address_valid(void)
+static inline bool is_mei_base_address_valid(void)
 {
    return mei_base_address && mei_base_address != (u32 *)0xfffffff0;
 }

-void me_finalize_smm(void)
+static void me_finalize_smm(void)
 {
    struct me_hfs hfs;
    u32 reg32;
@@ -396,6 +396,19 @@
    RCBA32_OR(FD2, PCH_DISABLE_MEI1);
 }

+void intel_me_finalize_smm(void)
+{
+	u32 did = pci_read_config32(PCH_ME_DEV, PCI_VENDOR_ID);
+	switch (did) {
+	case 0x1c3a8086:
+	case 0x1e3a8086:
+		me_finalize_smm();
+		break;
+	default:
+		printk(BIOS_ERR, "No finalize handler for ME %08x.\n", did);
+	}
+}
+
 #else

/* Prepare ME for MEI messages */