[coreboot-gerrit] [S] Change in coreboot[main]: soc/qualcomm/sc7280: Enlarge BOOTBLOCK to 44K

[Yidi Lin (Code Review)]

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78893?usp=email )

Change subject: soc/qualcomm/sc7280: Enlarge BOOTBLOCK to 44K
......................................................................

soc/qualcomm/sc7280: Enlarge BOOTBLOCK to 44K

After CB:78800 applied, the bootblock increases 2128 bytes and exceeded
its allotted size (40K). Therefore, we enlarge BOOTBLOCK to 44K to solve
the compilation error. This patch also increases PRERAM_CBFS_CACHE to
103K to fill the empty space (1K) between TIMESTAMP and TTB.

BRANCH=none
BUG=none
TEST=./util/abuild/abuild -p none -t GOOGLE_HEROBRINE -x -a -B

Change-Id: Iae9d44939b29098e823508dd3965a1bae7a69041
Signed-off-by: Yidi Lin 
---
M src/soc/qualcomm/sc7280/memlayout.ld
1 file changed, 6 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/78893/1

diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld
index 95824c7..231b9fe 100644
--- a/src/soc/qualcomm/sc7280/memlayout.ld
+++ b/src/soc/qualcomm/sc7280/memlayout.ld
@@ -33,12 +33,12 @@
    BSRAM_START(0x14800000)
    REGION(pbl_timestamps, 0x14800000, 84K, 4K)
    WATCHDOG_TOMBSTONE(0x14818FFC, 4)
-	BOOTBLOCK(0x14819000, 40K)
-	PRERAM_CBFS_CACHE(0x14823000, 102K)
-	TIMESTAMP(0x1483C800, 1K)
-	TTB(0x1483D000, 56K)
-	STACK(0x1484B000, 16K)
-	VBOOT2_WORK(0x1484F000, 12K)
+	BOOTBLOCK(0x14819000, 44K)
+	PRERAM_CBFS_CACHE(0x14824000, 103K)
+	TIMESTAMP(0x1483DC00, 1K)
+	TTB(0x1483E000, 56K)
+	STACK(0x1484C000, 16K)
+	VBOOT2_WORK(0x14850000, 12K)
    DMA_COHERENT(0x14853000, 8K)
    REGION(qclib_serial_log, 0x14857000, 4K, 4K)
    CBFS_MCACHE(0x14858000,16K)