[coreboot-gerrit] Change in coreboot[master]: nb/intel/x4x: Correct DDR3 turnaround table

[Angel Pons (Code Review)]

Attention is currently required from: Nico Huber, Damien Zammit, Arthur Heymans, Patrick Rudolph, Michael Büchler.
Hello build bot (Jenkins), Nico Huber, Damien Zammit, Arthur Heymans, Patrick Rudolph, Michael Büchler,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/49388

to look at the new patch set (#2).

Change subject: nb/intel/x4x: Correct DDR3 turnaround table
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nb/intel/x4x: Correct DDR3 turnaround table

Comparing against MRC, looks like the values for TA3 and TA4 are
backwards. All of them. Thus, correct the tables accordingly.

Tested on Acer G43T-AM3, DDR3-1066 and CL = 8 now works.

Change-Id: I2c99502b8f105c77098c888b024a4c3c2c8877d4
Tested-by: Michael Büchler 
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/x4x/raminit_ddr23.c
1 file changed, 6 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/49388/2