[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/cannonlake: Hook up Intel TXT FSP UPDs

[Filip Lewiński (Code Review)]

Attention is currently required from: Filip Lewiński, Intel coreboot Reviewers, Michał Kopeć, Paul Menzel.

Filip Lewiński has uploaded a new patch set (#5) to the change originally created by Michał Żygowski. ( https://review.coreboot.org/c/coreboot/+/83727?usp=email )

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel/cannonlake: Hook up Intel TXT FSP UPDs
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soc/intel/cannonlake: Hook up Intel TXT FSP UPDs

Set necessary parameters so that FSP can call BIOS ACM ACHECK
after MRC. It is required to perform ACHECK in certain conditions
and the Intel TXT will not function properly without calling it.

TEST=Boot Linux with tboot on Protectli VP4670 with Intel TXT enabled.

Change-Id: Ibca1c7c8a5335dab8af4888aee4c60683b72746d
Signed-off-by: Michał Żygowski 
---
M src/soc/intel/cannonlake/fsp_params.c
M src/soc/intel/cannonlake/romstage/Makefile.mk
M src/soc/intel/cannonlake/romstage/fsp_params.c
3 files changed, 25 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/83727/5