[coreboot-gerrit] Change in coreboot[master]: soc/amd/common: Correct SPI FIFO size check

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37721 )

Change subject: soc/amd/common: Correct SPI FIFO size check
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Patch Set 1:
> Patch Set 1: Code-Review-1
>
> I won't monitor this change further.

This code needs a major overhaul from my investigation. One thing I see that is problematic is the write protect scheme. It needs the specific commands encoded it is blocking. However, struct spi_flash doesn't expose all those commands. That seems to be small-ish undertaking, but I think we can remove 80% of the code introduced in this patch which duplicated a lot of logic: https://review.coreboot.org/c/coreboot/+/35018

I'm filing another bug to track fixing this situation up.