Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16716
-gerrit
commit 293b954d266ae493c7c5a0447428c78bf3a2ee9e Author: Jianqun Xu jay.xu@rock-chips.com Date: Sun Sep 11 18:26:42 2016 +0800
rockchip: rk3399: improve write leveling flow
To improve sdram 800MHz and 933MHz stability, we need to modify write leveling flow, to get the more proper write leveling value.
BUG=chrome-os-partner:56940 BRANCH=none TEST=Boot from kevin on 933MHz, and do stressapptest
Change-Id: I5b24c93d4a57917fb9af7e5e2a95d8423ccbaa7e Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: d84bf25b3e5de373c7913e6d534a810cb984b3fd Original-Change-Id: I87efddf628c3683fcb85d6875e029cf3cbc482be Original-Signed-off-by: Jianqun Xu jay.xu@rock-chips.com Original-Signed-off-by: Xing Zheng zhengxing@rock-chips.com Original-Signed-off-by: Lin Huang hl@rock-chips.com Original-Reviewed-on: https://chromium-review.googlesource.com/384292 Original-Commit-Ready: Julius Werner jwerner@chromium.org Original-Tested-by: Julius Werner jwerner@chromium.org Original-Reviewed-by: Julius Werner jwerner@chromium.org --- src/mainboard/google/gru/sdram_configs.c | 10 +-- .../gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c | 16 ++-- .../sdram-lpddr3-hynix-4GB-666-no-odt.c | 16 ++-- .../gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c | 16 ++-- .../sdram-lpddr3-hynix-4GB-800-no-odt.c | 56 ++++++------ .../gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c | 56 ++++++------ .../gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c | 56 ++++++------ src/soc/rockchip/rk3399/sdram.c | 99 ++++++++-------------- 8 files changed, 146 insertions(+), 179 deletions(-)
diff --git a/src/mainboard/google/gru/sdram_configs.c b/src/mainboard/google/gru/sdram_configs.c index 1235eff..2aa05a7 100644 --- a/src/mainboard/google/gru/sdram_configs.c +++ b/src/mainboard/google/gru/sdram_configs.c @@ -50,14 +50,10 @@ static enum dram_speeds get_sdram_index(void)
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_KEVIN)) switch (id) { - case 0: - case 1: - case 2: - return dram_200MHz; - case 3: - return dram_666MHz_NO_ODT; - default: + case 4: return dram_800MHz; + default: + return dram_933MHz; }
if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU)) diff --git a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c index a9ed180..c877158 100644 --- a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c +++ b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-200.c @@ -679,7 +679,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_75_DATA */ 0x00800080, /* DENALI_PHY_76_DATA */ 0x00800080, /* DENALI_PHY_77_DATA */ - 0x01900001, /* DENALI_PHY_78_DATA */ + 0x00000001, /* DENALI_PHY_78_DATA */ 0x00000000, /* DENALI_PHY_79_DATA */ 0x00000000, /* DENALI_PHY_80_DATA */ 0x00000200, /* DENALI_PHY_81_DATA */ @@ -688,7 +688,7 @@ struct rk3399_sdram_params params = { 0xc0003150, /* DENALI_PHY_84_DATA */ 0x010000c0, /* DENALI_PHY_85_DATA */ 0x00100000, /* DENALI_PHY_86_DATA */ - 0x0c044208, /* DENALI_PHY_87_DATA */ + 0x07044208, /* DENALI_PHY_87_DATA */ 0x000f0c18, /* DENALI_PHY_88_DATA */ 0x01000140, /* DENALI_PHY_89_DATA */ 0x00000c20, /* DENALI_PHY_90_DATA */ @@ -807,7 +807,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_203_DATA */ 0x00800080, /* DENALI_PHY_204_DATA */ 0x00800080, /* DENALI_PHY_205_DATA */ - 0x01900001, /* DENALI_PHY_206_DATA */ + 0x00000001, /* DENALI_PHY_206_DATA */ 0x00000000, /* DENALI_PHY_207_DATA */ 0x00000000, /* DENALI_PHY_208_DATA */ 0x00000200, /* DENALI_PHY_209_DATA */ @@ -816,7 +816,7 @@ struct rk3399_sdram_params params = { 0xc0003150, /* DENALI_PHY_212_DATA */ 0x010000c0, /* DENALI_PHY_213_DATA */ 0x00100000, /* DENALI_PHY_214_DATA */ - 0x0c044208, /* DENALI_PHY_215_DATA */ + 0x07044208, /* DENALI_PHY_215_DATA */ 0x000f0c18, /* DENALI_PHY_216_DATA */ 0x01000140, /* DENALI_PHY_217_DATA */ 0x00000c20, /* DENALI_PHY_218_DATA */ @@ -935,7 +935,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_331_DATA */ 0x00800080, /* DENALI_PHY_332_DATA */ 0x00800080, /* DENALI_PHY_333_DATA */ - 0x01900001, /* DENALI_PHY_334_DATA */ + 0x00000001, /* DENALI_PHY_334_DATA */ 0x00000000, /* DENALI_PHY_335_DATA */ 0x00000000, /* DENALI_PHY_336_DATA */ 0x00000200, /* DENALI_PHY_337_DATA */ @@ -944,7 +944,7 @@ struct rk3399_sdram_params params = { 0xc0003150, /* DENALI_PHY_340_DATA */ 0x010000c0, /* DENALI_PHY_341_DATA */ 0x00100000, /* DENALI_PHY_342_DATA */ - 0x0c044208, /* DENALI_PHY_343_DATA */ + 0x07044208, /* DENALI_PHY_343_DATA */ 0x000f0c18, /* DENALI_PHY_344_DATA */ 0x01000140, /* DENALI_PHY_345_DATA */ 0x00000c20, /* DENALI_PHY_346_DATA */ @@ -1063,7 +1063,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_459_DATA */ 0x00800080, /* DENALI_PHY_460_DATA */ 0x00800080, /* DENALI_PHY_461_DATA */ - 0x01900001, /* DENALI_PHY_462_DATA */ + 0x00000001, /* DENALI_PHY_462_DATA */ 0x00000000, /* DENALI_PHY_463_DATA */ 0x00000000, /* DENALI_PHY_464_DATA */ 0x00000200, /* DENALI_PHY_465_DATA */ @@ -1072,7 +1072,7 @@ struct rk3399_sdram_params params = { 0xc0003150, /* DENALI_PHY_468_DATA */ 0x010000c0, /* DENALI_PHY_469_DATA */ 0x00100000, /* DENALI_PHY_470_DATA */ - 0x0c044208, /* DENALI_PHY_471_DATA */ + 0x07044208, /* DENALI_PHY_471_DATA */ 0x000f0c18, /* DENALI_PHY_472_DATA */ 0x01000140, /* DENALI_PHY_473_DATA */ 0x00000c20, /* DENALI_PHY_474_DATA */ diff --git a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666-no-odt.c b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666-no-odt.c index ad0e30c..f57ac18 100644 --- a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666-no-odt.c +++ b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666-no-odt.c @@ -679,7 +679,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_75_DATA */ 0x00800080, /* DENALI_PHY_76_DATA */ 0x01c40080, /* DENALI_PHY_77_DATA */ - 0x01900002, /* DENALI_PHY_78_DATA */ + 0x00000002, /* DENALI_PHY_78_DATA */ 0x00000000, /* DENALI_PHY_79_DATA */ 0x00020000, /* DENALI_PHY_80_DATA */ 0x00000200, /* DENALI_PHY_81_DATA */ @@ -688,7 +688,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_84_DATA */ 0x010000c0, /* DENALI_PHY_85_DATA */ 0x00100000, /* DENALI_PHY_86_DATA */ - 0x0c054208, /* DENALI_PHY_87_DATA */ + 0x07054208, /* DENALI_PHY_87_DATA */ 0x000f0c18, /* DENALI_PHY_88_DATA */ 0x01000140, /* DENALI_PHY_89_DATA */ 0x00000c20, /* DENALI_PHY_90_DATA */ @@ -807,7 +807,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_203_DATA */ 0x00800080, /* DENALI_PHY_204_DATA */ 0x01c40080, /* DENALI_PHY_205_DATA */ - 0x01900002, /* DENALI_PHY_206_DATA */ + 0x00000002, /* DENALI_PHY_206_DATA */ 0x00000000, /* DENALI_PHY_207_DATA */ 0x00020000, /* DENALI_PHY_208_DATA */ 0x00000200, /* DENALI_PHY_209_DATA */ @@ -816,7 +816,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_212_DATA */ 0x010000c0, /* DENALI_PHY_213_DATA */ 0x00100000, /* DENALI_PHY_214_DATA */ - 0x0c054208, /* DENALI_PHY_215_DATA */ + 0x07054208, /* DENALI_PHY_215_DATA */ 0x000f0c18, /* DENALI_PHY_216_DATA */ 0x01000140, /* DENALI_PHY_217_DATA */ 0x00000c20, /* DENALI_PHY_218_DATA */ @@ -935,7 +935,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_331_DATA */ 0x00800080, /* DENALI_PHY_332_DATA */ 0x01c40080, /* DENALI_PHY_333_DATA */ - 0x01900002, /* DENALI_PHY_334_DATA */ + 0x00000002, /* DENALI_PHY_334_DATA */ 0x00000000, /* DENALI_PHY_335_DATA */ 0x00020000, /* DENALI_PHY_336_DATA */ 0x00000200, /* DENALI_PHY_337_DATA */ @@ -944,7 +944,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_340_DATA */ 0x010000c0, /* DENALI_PHY_341_DATA */ 0x00100000, /* DENALI_PHY_342_DATA */ - 0x0c054208, /* DENALI_PHY_343_DATA */ + 0x07054208, /* DENALI_PHY_343_DATA */ 0x000f0c18, /* DENALI_PHY_344_DATA */ 0x01000140, /* DENALI_PHY_345_DATA */ 0x00000c20, /* DENALI_PHY_346_DATA */ @@ -1063,7 +1063,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_459_DATA */ 0x00800080, /* DENALI_PHY_460_DATA */ 0x01c40080, /* DENALI_PHY_461_DATA */ - 0x01900002, /* DENALI_PHY_462_DATA */ + 0x00000002, /* DENALI_PHY_462_DATA */ 0x00000000, /* DENALI_PHY_463_DATA */ 0x00020000, /* DENALI_PHY_464_DATA */ 0x00000200, /* DENALI_PHY_465_DATA */ @@ -1072,7 +1072,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_468_DATA */ 0x010000c0, /* DENALI_PHY_469_DATA */ 0x00100000, /* DENALI_PHY_470_DATA */ - 0x0c054208, /* DENALI_PHY_471_DATA */ + 0x07054208, /* DENALI_PHY_471_DATA */ 0x000f0c18, /* DENALI_PHY_472_DATA */ 0x01000140, /* DENALI_PHY_473_DATA */ 0x00000c20, /* DENALI_PHY_474_DATA */ diff --git a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c index 7543e10..591924d 100644 --- a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c +++ b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-666.c @@ -679,7 +679,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_75_DATA */ 0x00800080, /* DENALI_PHY_76_DATA */ 0x01c40080, /* DENALI_PHY_77_DATA */ - 0x01900002, /* DENALI_PHY_78_DATA */ + 0x00000002, /* DENALI_PHY_78_DATA */ 0x00000000, /* DENALI_PHY_79_DATA */ 0x00020000, /* DENALI_PHY_80_DATA */ 0x00000200, /* DENALI_PHY_81_DATA */ @@ -688,7 +688,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_84_DATA */ 0x010000c0, /* DENALI_PHY_85_DATA */ 0x00100000, /* DENALI_PHY_86_DATA */ - 0x0c054208, /* DENALI_PHY_87_DATA */ + 0x07054208, /* DENALI_PHY_87_DATA */ 0x000f0c18, /* DENALI_PHY_88_DATA */ 0x01000140, /* DENALI_PHY_89_DATA */ 0x00000c20, /* DENALI_PHY_90_DATA */ @@ -807,7 +807,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_203_DATA */ 0x00800080, /* DENALI_PHY_204_DATA */ 0x01c40080, /* DENALI_PHY_205_DATA */ - 0x01900002, /* DENALI_PHY_206_DATA */ + 0x00000002, /* DENALI_PHY_206_DATA */ 0x00000000, /* DENALI_PHY_207_DATA */ 0x00020000, /* DENALI_PHY_208_DATA */ 0x00000200, /* DENALI_PHY_209_DATA */ @@ -816,7 +816,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_212_DATA */ 0x010000c0, /* DENALI_PHY_213_DATA */ 0x00100000, /* DENALI_PHY_214_DATA */ - 0x0c054208, /* DENALI_PHY_215_DATA */ + 0x07054208, /* DENALI_PHY_215_DATA */ 0x000f0c18, /* DENALI_PHY_216_DATA */ 0x01000140, /* DENALI_PHY_217_DATA */ 0x00000c20, /* DENALI_PHY_218_DATA */ @@ -935,7 +935,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_331_DATA */ 0x00800080, /* DENALI_PHY_332_DATA */ 0x01c40080, /* DENALI_PHY_333_DATA */ - 0x01900002, /* DENALI_PHY_334_DATA */ + 0x00000002, /* DENALI_PHY_334_DATA */ 0x00000000, /* DENALI_PHY_335_DATA */ 0x00020000, /* DENALI_PHY_336_DATA */ 0x00000200, /* DENALI_PHY_337_DATA */ @@ -944,7 +944,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_340_DATA */ 0x010000c0, /* DENALI_PHY_341_DATA */ 0x00100000, /* DENALI_PHY_342_DATA */ - 0x0c054208, /* DENALI_PHY_343_DATA */ + 0x07054208, /* DENALI_PHY_343_DATA */ 0x000f0c18, /* DENALI_PHY_344_DATA */ 0x01000140, /* DENALI_PHY_345_DATA */ 0x00000c20, /* DENALI_PHY_346_DATA */ @@ -1063,7 +1063,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_459_DATA */ 0x00800080, /* DENALI_PHY_460_DATA */ 0x01c40080, /* DENALI_PHY_461_DATA */ - 0x01900002, /* DENALI_PHY_462_DATA */ + 0x00000002, /* DENALI_PHY_462_DATA */ 0x00000000, /* DENALI_PHY_463_DATA */ 0x00020000, /* DENALI_PHY_464_DATA */ 0x00000200, /* DENALI_PHY_465_DATA */ @@ -1072,7 +1072,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_468_DATA */ 0x010000c0, /* DENALI_PHY_469_DATA */ 0x00100000, /* DENALI_PHY_470_DATA */ - 0x0c054208, /* DENALI_PHY_471_DATA */ + 0x07054208, /* DENALI_PHY_471_DATA */ 0x000f0c18, /* DENALI_PHY_472_DATA */ 0x01000140, /* DENALI_PHY_473_DATA */ 0x00000c20, /* DENALI_PHY_474_DATA */ diff --git a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800-no-odt.c b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800-no-odt.c index fde24c7e..21f7044 100644 --- a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800-no-odt.c +++ b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800-no-odt.c @@ -660,11 +660,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_56_DATA */ 0x00000000, /* DENALI_PHY_57_DATA */ 0x00000000, /* DENALI_PHY_58_DATA */ - 0x02800280, /* DENALI_PHY_59_DATA */ - 0x02800280, /* DENALI_PHY_60_DATA */ - 0x02800280, /* DENALI_PHY_61_DATA */ - 0x02800280, /* DENALI_PHY_62_DATA */ - 0x00000280, /* DENALI_PHY_63_DATA */ + 0x02700270, /* DENALI_PHY_59_DATA */ + 0x02700270, /* DENALI_PHY_60_DATA */ + 0x02700270, /* DENALI_PHY_61_DATA */ + 0x02700270, /* DENALI_PHY_62_DATA */ + 0x00000270, /* DENALI_PHY_63_DATA */ 0x00000000, /* DENALI_PHY_64_DATA */ 0x00000000, /* DENALI_PHY_65_DATA */ 0x00000000, /* DENALI_PHY_66_DATA */ @@ -679,7 +679,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_75_DATA */ 0x00800080, /* DENALI_PHY_76_DATA */ 0x00b30080, /* DENALI_PHY_77_DATA */ - 0x01900003, /* DENALI_PHY_78_DATA */ + 0x00000003, /* DENALI_PHY_78_DATA */ 0x00000000, /* DENALI_PHY_79_DATA */ 0x00020000, /* DENALI_PHY_80_DATA */ 0x00000200, /* DENALI_PHY_81_DATA */ @@ -688,7 +688,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_84_DATA */ 0x020000c0, /* DENALI_PHY_85_DATA */ 0x00100001, /* DENALI_PHY_86_DATA */ - 0x0c054208, /* DENALI_PHY_87_DATA */ + 0x07054208, /* DENALI_PHY_87_DATA */ 0x000f0c18, /* DENALI_PHY_88_DATA */ 0x01000140, /* DENALI_PHY_89_DATA */ 0x00000c20, /* DENALI_PHY_90_DATA */ @@ -788,11 +788,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_184_DATA */ 0x00000000, /* DENALI_PHY_185_DATA */ 0x00000000, /* DENALI_PHY_186_DATA */ - 0x02800280, /* DENALI_PHY_187_DATA */ - 0x02800280, /* DENALI_PHY_188_DATA */ - 0x02800280, /* DENALI_PHY_189_DATA */ - 0x02800280, /* DENALI_PHY_190_DATA */ - 0x00000280, /* DENALI_PHY_191_DATA */ + 0x02700270, /* DENALI_PHY_187_DATA */ + 0x02700270, /* DENALI_PHY_188_DATA */ + 0x02700270, /* DENALI_PHY_189_DATA */ + 0x02700270, /* DENALI_PHY_190_DATA */ + 0x00000270, /* DENALI_PHY_191_DATA */ 0x00000000, /* DENALI_PHY_192_DATA */ 0x00000000, /* DENALI_PHY_193_DATA */ 0x00000000, /* DENALI_PHY_194_DATA */ @@ -807,7 +807,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_203_DATA */ 0x00800080, /* DENALI_PHY_204_DATA */ 0x00b30080, /* DENALI_PHY_205_DATA */ - 0x01900003, /* DENALI_PHY_206_DATA */ + 0x00000003, /* DENALI_PHY_206_DATA */ 0x00000000, /* DENALI_PHY_207_DATA */ 0x00020000, /* DENALI_PHY_208_DATA */ 0x00000200, /* DENALI_PHY_209_DATA */ @@ -816,7 +816,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_212_DATA */ 0x020000c0, /* DENALI_PHY_213_DATA */ 0x00100001, /* DENALI_PHY_214_DATA */ - 0x0c054208, /* DENALI_PHY_215_DATA */ + 0x07054208, /* DENALI_PHY_215_DATA */ 0x000f0c18, /* DENALI_PHY_216_DATA */ 0x01000140, /* DENALI_PHY_217_DATA */ 0x00000c20, /* DENALI_PHY_218_DATA */ @@ -916,11 +916,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_312_DATA */ 0x00000000, /* DENALI_PHY_313_DATA */ 0x00000000, /* DENALI_PHY_314_DATA */ - 0x02800280, /* DENALI_PHY_315_DATA */ - 0x02800280, /* DENALI_PHY_316_DATA */ - 0x02800280, /* DENALI_PHY_317_DATA */ - 0x02800280, /* DENALI_PHY_318_DATA */ - 0x00000280, /* DENALI_PHY_319_DATA */ + 0x02700270, /* DENALI_PHY_315_DATA */ + 0x02700270, /* DENALI_PHY_316_DATA */ + 0x02700270, /* DENALI_PHY_317_DATA */ + 0x02700270, /* DENALI_PHY_318_DATA */ + 0x00000270, /* DENALI_PHY_319_DATA */ 0x00000000, /* DENALI_PHY_320_DATA */ 0x00000000, /* DENALI_PHY_321_DATA */ 0x00000000, /* DENALI_PHY_322_DATA */ @@ -935,7 +935,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_331_DATA */ 0x00800080, /* DENALI_PHY_332_DATA */ 0x00b30080, /* DENALI_PHY_333_DATA */ - 0x01900003, /* DENALI_PHY_334_DATA */ + 0x00000003, /* DENALI_PHY_334_DATA */ 0x00000000, /* DENALI_PHY_335_DATA */ 0x00020000, /* DENALI_PHY_336_DATA */ 0x00000200, /* DENALI_PHY_337_DATA */ @@ -944,7 +944,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_340_DATA */ 0x020000c0, /* DENALI_PHY_341_DATA */ 0x00100001, /* DENALI_PHY_342_DATA */ - 0x0c054208, /* DENALI_PHY_343_DATA */ + 0x07054208, /* DENALI_PHY_343_DATA */ 0x000f0c18, /* DENALI_PHY_344_DATA */ 0x01000140, /* DENALI_PHY_345_DATA */ 0x00000c20, /* DENALI_PHY_346_DATA */ @@ -1044,11 +1044,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_440_DATA */ 0x00000000, /* DENALI_PHY_441_DATA */ 0x00000000, /* DENALI_PHY_442_DATA */ - 0x02800280, /* DENALI_PHY_443_DATA */ - 0x02800280, /* DENALI_PHY_444_DATA */ - 0x02800280, /* DENALI_PHY_445_DATA */ - 0x02800280, /* DENALI_PHY_446_DATA */ - 0x00000280, /* DENALI_PHY_447_DATA */ + 0x02700270, /* DENALI_PHY_443_DATA */ + 0x02700270, /* DENALI_PHY_444_DATA */ + 0x02700270, /* DENALI_PHY_445_DATA */ + 0x02700270, /* DENALI_PHY_446_DATA */ + 0x00000270, /* DENALI_PHY_447_DATA */ 0x00000000, /* DENALI_PHY_448_DATA */ 0x00000000, /* DENALI_PHY_449_DATA */ 0x00000000, /* DENALI_PHY_450_DATA */ @@ -1063,7 +1063,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_459_DATA */ 0x00800080, /* DENALI_PHY_460_DATA */ 0x00b30080, /* DENALI_PHY_461_DATA */ - 0x01900003, /* DENALI_PHY_462_DATA */ + 0x00000003, /* DENALI_PHY_462_DATA */ 0x00000000, /* DENALI_PHY_463_DATA */ 0x00020000, /* DENALI_PHY_464_DATA */ 0x00000200, /* DENALI_PHY_465_DATA */ @@ -1072,7 +1072,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_468_DATA */ 0x020000c0, /* DENALI_PHY_469_DATA */ 0x00100001, /* DENALI_PHY_470_DATA */ - 0x0c054208, /* DENALI_PHY_471_DATA */ + 0x07054208, /* DENALI_PHY_471_DATA */ 0x000f0c18, /* DENALI_PHY_472_DATA */ 0x01000140, /* DENALI_PHY_473_DATA */ 0x00000c20, /* DENALI_PHY_474_DATA */ diff --git a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c index 1544bd0..b738644 100644 --- a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c +++ b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-800.c @@ -660,11 +660,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_56_DATA */ 0x00000000, /* DENALI_PHY_57_DATA */ 0x00000000, /* DENALI_PHY_58_DATA */ - 0x02600260, /* DENALI_PHY_59_DATA */ - 0x02600260, /* DENALI_PHY_60_DATA */ - 0x02600260, /* DENALI_PHY_61_DATA */ - 0x02600260, /* DENALI_PHY_62_DATA */ - 0x00000260, /* DENALI_PHY_63_DATA */ + 0x02700270, /* DENALI_PHY_59_DATA */ + 0x02700270, /* DENALI_PHY_60_DATA */ + 0x02700270, /* DENALI_PHY_61_DATA */ + 0x02700270, /* DENALI_PHY_62_DATA */ + 0x00000270, /* DENALI_PHY_63_DATA */ 0x00000000, /* DENALI_PHY_64_DATA */ 0x00000000, /* DENALI_PHY_65_DATA */ 0x00000000, /* DENALI_PHY_66_DATA */ @@ -679,7 +679,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_75_DATA */ 0x00800080, /* DENALI_PHY_76_DATA */ 0x00b30080, /* DENALI_PHY_77_DATA */ - 0x01900003, /* DENALI_PHY_78_DATA */ + 0x00000003, /* DENALI_PHY_78_DATA */ 0x00000000, /* DENALI_PHY_79_DATA */ 0x00020000, /* DENALI_PHY_80_DATA */ 0x00000200, /* DENALI_PHY_81_DATA */ @@ -688,7 +688,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_84_DATA */ 0x020000c0, /* DENALI_PHY_85_DATA */ 0x00100001, /* DENALI_PHY_86_DATA */ - 0x0c054208, /* DENALI_PHY_87_DATA */ + 0x07054208, /* DENALI_PHY_87_DATA */ 0x000f0c18, /* DENALI_PHY_88_DATA */ 0x01000140, /* DENALI_PHY_89_DATA */ 0x00000c20, /* DENALI_PHY_90_DATA */ @@ -788,11 +788,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_184_DATA */ 0x00000000, /* DENALI_PHY_185_DATA */ 0x00000000, /* DENALI_PHY_186_DATA */ - 0x02600260, /* DENALI_PHY_187_DATA */ - 0x02600260, /* DENALI_PHY_188_DATA */ - 0x02600260, /* DENALI_PHY_189_DATA */ - 0x02600260, /* DENALI_PHY_190_DATA */ - 0x00000260, /* DENALI_PHY_191_DATA */ + 0x02700270, /* DENALI_PHY_187_DATA */ + 0x02700270, /* DENALI_PHY_188_DATA */ + 0x02700270, /* DENALI_PHY_189_DATA */ + 0x02700270, /* DENALI_PHY_190_DATA */ + 0x00000270, /* DENALI_PHY_191_DATA */ 0x00000000, /* DENALI_PHY_192_DATA */ 0x00000000, /* DENALI_PHY_193_DATA */ 0x00000000, /* DENALI_PHY_194_DATA */ @@ -807,7 +807,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_203_DATA */ 0x00800080, /* DENALI_PHY_204_DATA */ 0x00b30080, /* DENALI_PHY_205_DATA */ - 0x01900003, /* DENALI_PHY_206_DATA */ + 0x00000003, /* DENALI_PHY_206_DATA */ 0x00000000, /* DENALI_PHY_207_DATA */ 0x00020000, /* DENALI_PHY_208_DATA */ 0x00000200, /* DENALI_PHY_209_DATA */ @@ -816,7 +816,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_212_DATA */ 0x020000c0, /* DENALI_PHY_213_DATA */ 0x00100001, /* DENALI_PHY_214_DATA */ - 0x0c054208, /* DENALI_PHY_215_DATA */ + 0x07054208, /* DENALI_PHY_215_DATA */ 0x000f0c18, /* DENALI_PHY_216_DATA */ 0x01000140, /* DENALI_PHY_217_DATA */ 0x00000c20, /* DENALI_PHY_218_DATA */ @@ -916,11 +916,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_312_DATA */ 0x00000000, /* DENALI_PHY_313_DATA */ 0x00000000, /* DENALI_PHY_314_DATA */ - 0x02600260, /* DENALI_PHY_315_DATA */ - 0x02600260, /* DENALI_PHY_316_DATA */ - 0x02600260, /* DENALI_PHY_317_DATA */ - 0x02600260, /* DENALI_PHY_318_DATA */ - 0x00000260, /* DENALI_PHY_319_DATA */ + 0x02700270, /* DENALI_PHY_315_DATA */ + 0x02700270, /* DENALI_PHY_316_DATA */ + 0x02700270, /* DENALI_PHY_317_DATA */ + 0x02700270, /* DENALI_PHY_318_DATA */ + 0x00000270, /* DENALI_PHY_319_DATA */ 0x00000000, /* DENALI_PHY_320_DATA */ 0x00000000, /* DENALI_PHY_321_DATA */ 0x00000000, /* DENALI_PHY_322_DATA */ @@ -935,7 +935,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_331_DATA */ 0x00800080, /* DENALI_PHY_332_DATA */ 0x00b30080, /* DENALI_PHY_333_DATA */ - 0x01900003, /* DENALI_PHY_334_DATA */ + 0x00000003, /* DENALI_PHY_334_DATA */ 0x00000000, /* DENALI_PHY_335_DATA */ 0x00020000, /* DENALI_PHY_336_DATA */ 0x00000200, /* DENALI_PHY_337_DATA */ @@ -944,7 +944,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_340_DATA */ 0x020000c0, /* DENALI_PHY_341_DATA */ 0x00100001, /* DENALI_PHY_342_DATA */ - 0x0c054208, /* DENALI_PHY_343_DATA */ + 0x07054208, /* DENALI_PHY_343_DATA */ 0x000f0c18, /* DENALI_PHY_344_DATA */ 0x01000140, /* DENALI_PHY_345_DATA */ 0x00000c20, /* DENALI_PHY_346_DATA */ @@ -1044,11 +1044,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_440_DATA */ 0x00000000, /* DENALI_PHY_441_DATA */ 0x00000000, /* DENALI_PHY_442_DATA */ - 0x02600260, /* DENALI_PHY_443_DATA */ - 0x02600260, /* DENALI_PHY_444_DATA */ - 0x02600260, /* DENALI_PHY_445_DATA */ - 0x02600260, /* DENALI_PHY_446_DATA */ - 0x00000260, /* DENALI_PHY_447_DATA */ + 0x02700270, /* DENALI_PHY_443_DATA */ + 0x02700270, /* DENALI_PHY_444_DATA */ + 0x02700270, /* DENALI_PHY_445_DATA */ + 0x02700270, /* DENALI_PHY_446_DATA */ + 0x00000270, /* DENALI_PHY_447_DATA */ 0x00000000, /* DENALI_PHY_448_DATA */ 0x00000000, /* DENALI_PHY_449_DATA */ 0x00000000, /* DENALI_PHY_450_DATA */ @@ -1063,7 +1063,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_459_DATA */ 0x00800080, /* DENALI_PHY_460_DATA */ 0x00b30080, /* DENALI_PHY_461_DATA */ - 0x01900003, /* DENALI_PHY_462_DATA */ + 0x00000003, /* DENALI_PHY_462_DATA */ 0x00000000, /* DENALI_PHY_463_DATA */ 0x00020000, /* DENALI_PHY_464_DATA */ 0x00000200, /* DENALI_PHY_465_DATA */ @@ -1072,7 +1072,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_468_DATA */ 0x020000c0, /* DENALI_PHY_469_DATA */ 0x00100001, /* DENALI_PHY_470_DATA */ - 0x0c054208, /* DENALI_PHY_471_DATA */ + 0x07054208, /* DENALI_PHY_471_DATA */ 0x000f0c18, /* DENALI_PHY_472_DATA */ 0x01000140, /* DENALI_PHY_473_DATA */ 0x00000c20, /* DENALI_PHY_474_DATA */ diff --git a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c index a4d2007..362489b 100644 --- a/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c +++ b/src/mainboard/google/gru/sdram_params/sdram-lpddr3-hynix-4GB-933.c @@ -660,11 +660,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_56_DATA */ 0x00000000, /* DENALI_PHY_57_DATA */ 0x00000000, /* DENALI_PHY_58_DATA */ - 0x02600260, /* DENALI_PHY_59_DATA */ - 0x02600260, /* DENALI_PHY_60_DATA */ - 0x02600260, /* DENALI_PHY_61_DATA */ - 0x02600260, /* DENALI_PHY_62_DATA */ - 0x00000260, /* DENALI_PHY_63_DATA */ + 0x02700270, /* DENALI_PHY_59_DATA */ + 0x02700270, /* DENALI_PHY_60_DATA */ + 0x02700270, /* DENALI_PHY_61_DATA */ + 0x02700270, /* DENALI_PHY_62_DATA */ + 0x00000270, /* DENALI_PHY_63_DATA */ 0x00000000, /* DENALI_PHY_64_DATA */ 0x00000000, /* DENALI_PHY_65_DATA */ 0x00000000, /* DENALI_PHY_66_DATA */ @@ -679,7 +679,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_75_DATA */ 0x00800080, /* DENALI_PHY_76_DATA */ 0x01a20080, /* DENALI_PHY_77_DATA */ - 0x01900003, /* DENALI_PHY_78_DATA */ + 0x00000003, /* DENALI_PHY_78_DATA */ 0x00000000, /* DENALI_PHY_79_DATA */ 0x00030000, /* DENALI_PHY_80_DATA */ 0x00000200, /* DENALI_PHY_81_DATA */ @@ -688,7 +688,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_84_DATA */ 0x020000c0, /* DENALI_PHY_85_DATA */ 0x00100001, /* DENALI_PHY_86_DATA */ - 0x0c064208, /* DENALI_PHY_87_DATA */ + 0x07064208, /* DENALI_PHY_87_DATA */ 0x000f0c18, /* DENALI_PHY_88_DATA */ 0x01000140, /* DENALI_PHY_89_DATA */ 0x00000c20, /* DENALI_PHY_90_DATA */ @@ -788,11 +788,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_184_DATA */ 0x00000000, /* DENALI_PHY_185_DATA */ 0x00000000, /* DENALI_PHY_186_DATA */ - 0x02600260, /* DENALI_PHY_187_DATA */ - 0x02600260, /* DENALI_PHY_188_DATA */ - 0x02600260, /* DENALI_PHY_189_DATA */ - 0x02600260, /* DENALI_PHY_190_DATA */ - 0x00000260, /* DENALI_PHY_191_DATA */ + 0x02700270, /* DENALI_PHY_187_DATA */ + 0x02700270, /* DENALI_PHY_188_DATA */ + 0x02700270, /* DENALI_PHY_189_DATA */ + 0x02700270, /* DENALI_PHY_190_DATA */ + 0x00000270, /* DENALI_PHY_191_DATA */ 0x00000000, /* DENALI_PHY_192_DATA */ 0x00000000, /* DENALI_PHY_193_DATA */ 0x00000000, /* DENALI_PHY_194_DATA */ @@ -807,7 +807,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_203_DATA */ 0x00800080, /* DENALI_PHY_204_DATA */ 0x01a20080, /* DENALI_PHY_205_DATA */ - 0x01900003, /* DENALI_PHY_206_DATA */ + 0x00000003, /* DENALI_PHY_206_DATA */ 0x00000000, /* DENALI_PHY_207_DATA */ 0x00030000, /* DENALI_PHY_208_DATA */ 0x00000200, /* DENALI_PHY_209_DATA */ @@ -816,7 +816,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_212_DATA */ 0x020000c0, /* DENALI_PHY_213_DATA */ 0x00100001, /* DENALI_PHY_214_DATA */ - 0x0c064208, /* DENALI_PHY_215_DATA */ + 0x07064208, /* DENALI_PHY_215_DATA */ 0x000f0c18, /* DENALI_PHY_216_DATA */ 0x01000140, /* DENALI_PHY_217_DATA */ 0x00000c20, /* DENALI_PHY_218_DATA */ @@ -916,11 +916,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_312_DATA */ 0x00000000, /* DENALI_PHY_313_DATA */ 0x00000000, /* DENALI_PHY_314_DATA */ - 0x02600260, /* DENALI_PHY_315_DATA */ - 0x02600260, /* DENALI_PHY_316_DATA */ - 0x02600260, /* DENALI_PHY_317_DATA */ - 0x02600260, /* DENALI_PHY_318_DATA */ - 0x00000260, /* DENALI_PHY_319_DATA */ + 0x02700270, /* DENALI_PHY_315_DATA */ + 0x02700270, /* DENALI_PHY_316_DATA */ + 0x02700270, /* DENALI_PHY_317_DATA */ + 0x02700270, /* DENALI_PHY_318_DATA */ + 0x00000270, /* DENALI_PHY_319_DATA */ 0x00000000, /* DENALI_PHY_320_DATA */ 0x00000000, /* DENALI_PHY_321_DATA */ 0x00000000, /* DENALI_PHY_322_DATA */ @@ -935,7 +935,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_331_DATA */ 0x00800080, /* DENALI_PHY_332_DATA */ 0x01a20080, /* DENALI_PHY_333_DATA */ - 0x01900003, /* DENALI_PHY_334_DATA */ + 0x00000003, /* DENALI_PHY_334_DATA */ 0x00000000, /* DENALI_PHY_335_DATA */ 0x00030000, /* DENALI_PHY_336_DATA */ 0x00000200, /* DENALI_PHY_337_DATA */ @@ -944,7 +944,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_340_DATA */ 0x020000c0, /* DENALI_PHY_341_DATA */ 0x00100001, /* DENALI_PHY_342_DATA */ - 0x0c064208, /* DENALI_PHY_343_DATA */ + 0x07064208, /* DENALI_PHY_343_DATA */ 0x000f0c18, /* DENALI_PHY_344_DATA */ 0x01000140, /* DENALI_PHY_345_DATA */ 0x00000c20, /* DENALI_PHY_346_DATA */ @@ -1044,11 +1044,11 @@ struct rk3399_sdram_params params = { 0x00000000, /* DENALI_PHY_440_DATA */ 0x00000000, /* DENALI_PHY_441_DATA */ 0x00000000, /* DENALI_PHY_442_DATA */ - 0x02600260, /* DENALI_PHY_443_DATA */ - 0x02600260, /* DENALI_PHY_444_DATA */ - 0x02600260, /* DENALI_PHY_445_DATA */ - 0x02600260, /* DENALI_PHY_446_DATA */ - 0x00000260, /* DENALI_PHY_447_DATA */ + 0x02700270, /* DENALI_PHY_443_DATA */ + 0x02700270, /* DENALI_PHY_444_DATA */ + 0x02700270, /* DENALI_PHY_445_DATA */ + 0x02700270, /* DENALI_PHY_446_DATA */ + 0x00000270, /* DENALI_PHY_447_DATA */ 0x00000000, /* DENALI_PHY_448_DATA */ 0x00000000, /* DENALI_PHY_449_DATA */ 0x00000000, /* DENALI_PHY_450_DATA */ @@ -1063,7 +1063,7 @@ struct rk3399_sdram_params params = { 0x00800080, /* DENALI_PHY_459_DATA */ 0x00800080, /* DENALI_PHY_460_DATA */ 0x01a20080, /* DENALI_PHY_461_DATA */ - 0x01900003, /* DENALI_PHY_462_DATA */ + 0x00000003, /* DENALI_PHY_462_DATA */ 0x00000000, /* DENALI_PHY_463_DATA */ 0x00030000, /* DENALI_PHY_464_DATA */ 0x00000200, /* DENALI_PHY_465_DATA */ @@ -1072,7 +1072,7 @@ struct rk3399_sdram_params params = { 0xc0013150, /* DENALI_PHY_468_DATA */ 0x020000c0, /* DENALI_PHY_469_DATA */ 0x00100001, /* DENALI_PHY_470_DATA */ - 0x0c064208, /* DENALI_PHY_471_DATA */ + 0x07064208, /* DENALI_PHY_471_DATA */ 0x000f0c18, /* DENALI_PHY_472_DATA */ 0x01000140, /* DENALI_PHY_473_DATA */ 0x00000c20, /* DENALI_PHY_474_DATA */ diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c index 9aa2952..9211895 100644 --- a/src/soc/rockchip/rk3399/sdram.c +++ b/src/soc/rockchip/rk3399/sdram.c @@ -580,10 +580,9 @@ static void check_write_leveling_value(u32 channel, const struct rk3399_sdram_params *sdram_params) { - u32 *denali_pi = rk3399_ddr_pi[channel]->denali_pi; + u32 *denali_ctl = rk3399_ddr_pctl[channel]->denali_ctl; u32 *denali_phy = rk3399_ddr_publ[channel]->denali_phy; - u32 i, tmp; - u32 obs_0, obs_1, obs_2, obs_3, obs_err = 0; + u32 i, j; u32 wl_value[2][4]; u32 rank = sdram_params->ch[channel].rank;
@@ -602,71 +601,43 @@ static void check_write_leveling_value(u32 channel, wl_value[i][3] = (read32(&denali_phy[447]) >> 16) & 0x3ff; }
- for (i = 0; i < 4; i++) { - if (((wl_value[0][i] > 0x1E0) || (wl_value[0][i] < 0x20)) && - ((wl_value[1][i] > 0x1E0) || (wl_value[1][i] < 0x20))) { - switch (i) { - case 0: - setbits_le32(&denali_phy[79], 0x1 << 16); - break; - case 1: - setbits_le32(&denali_phy[207], 0x1 << 16); - break; - case 2: - setbits_le32(&denali_phy[335], 0x1 << 16); - break; - case 3: - setbits_le32(&denali_phy[463], 0x1 << 16); - break; - default: - break; - } - } - } + /* + * PHY_8/136/264/392 + * phy_per_cs_training_multicast_en_X 1bit offset_16 + */ + clrsetbits_le32(&denali_phy[8], 0x1 << 16, 0 << 16); + clrsetbits_le32(&denali_phy[136], 0x1 << 16, 0 << 16); + clrsetbits_le32(&denali_phy[264], 0x1 << 16, 0 << 16); + clrsetbits_le32(&denali_phy[392], 0x1 << 16, 0 << 16);
for (i = 0; i < rank; i++) { - - /* FIXME: denali_phy[463] value wrong if miss this delay */ - udelay(100); - - /* PI_60 PI_WRLVL_EN:RW:8:2 */ - clrsetbits_le32(&denali_pi[60], 0x3 << 8, 0x2 << 8); - /* PI_59 PI_WRLVL_REQ:WR:8:1,PI_WRLVL_CS:RW:16:2 */ - clrsetbits_le32(&denali_pi[59], (0x1 << 8) | (0x3 << 16), - (0x1 << 8) | (i << 16)); - - select_per_cs_training_index(channel, i); - while (1) { - /* PI_174 PI_INT_STATUS:RD:8:25 */ - tmp = read32(&denali_pi[174]) >> 8; - - /* - * check status obs, - * if error maybe can not get leveling done - * PHY_40/168/296/424 phy_wrlvl_status_obs_X:0:13 - */ - obs_0 = read32(&denali_phy[40]); - obs_1 = read32(&denali_phy[168]); - obs_2 = read32(&denali_phy[296]); - obs_3 = read32(&denali_phy[424]); - if (((obs_0 >> 12) & 0x1) || - ((obs_1 >> 12) & 0x1) || - ((obs_2 >> 12) & 0x1) || - ((obs_3 >> 12) & 0x1)) - obs_err = 1; - if ((((tmp >> 10) & 0x1) == 0x1) && - (((tmp >> 13) & 0x1) == 0x1) && - (((tmp >> 4) & 0x1) == 0x0) && - (obs_err == 0)) - break; - else if ((((tmp >> 4) & 0x1) == 0x1) || - (obs_err == 1)) - printk(BIOS_DEBUG, - "check_write_leveling_value error!!!\n"); + clrsetbits_le32(&denali_phy[8], 0x1 << 24, i << 24); + clrsetbits_le32(&denali_phy[136], 0x1 << 24, i << 24); + clrsetbits_le32(&denali_phy[264], 0x1 << 24, i << 24); + clrsetbits_le32(&denali_phy[392], 0x1 << 24, i << 24); + for (j = 0; j < 4; j++) { + if (wl_value[i][j] < 0x80) + clrsetbits_le32(&denali_phy[63+j*128], + 0x3ff << 16, + (wl_value[i][j]+0x200) << 16); + else if ((wl_value[i][j] >= 0x80) && + (wl_value[i][j] < 0x100)) + clrsetbits_le32(&denali_phy[78+j*128], + 0x7 << 8, 0x1 << 8); } - /* clear interrupt,PI_175 PI_INT_ACK:WR:0:17 */ - write32((&denali_pi[175]), 0x00003f7c); } + + /* CTL_200 ctrlupd_req 1bit offset_8 */ + clrsetbits_le32(&denali_ctl[200], 0x1 << 8, 0x1 << 8); + + /* + * PHY_8/136/264/392 + * phy_per_cs_training_multicast_en_X 1bit offset_16 + */ + clrsetbits_le32(&denali_phy[8], 0x1 << 16, 1 << 16); + clrsetbits_le32(&denali_phy[136], 0x1 << 16, 1 << 16); + clrsetbits_le32(&denali_phy[264], 0x1 << 16, 1 << 16); + clrsetbits_le32(&denali_phy[392], 0x1 << 16, 1 << 16); }
static int data_training(u32 channel,