[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Log CSE RO write protection info for ADL

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62987 )

Change subject: soc/intel/alderlake: Log CSE RO write protection info for ADL
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Patch Set 7:

(1 comment)

File src/soc/intel/alderlake/me.c:

https://review.coreboot.org/c/coreboot/+/62987/comment/afff0016_4388d191 
PS7, Line 111: die
> We will see the issue (mfg mode disabled but WP for CSE RO is not enabled) in the factory itself.  […]

Like EOM status, let's log only the status of WP status for CSE RO. Thanks!